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<p style="margin-top:0;margin-bottom:0">Drop this patch.</p>
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<p style="margin-top:0;margin-bottom:0">As Eric point out that</p>
<p style="margin-top:0;margin-bottom:0"><br>
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<p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> power containment disabled
only on Fiji and compute</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">
<span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> power profile. It violates PCIe spec and may cause power</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">
<span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> supply failed. Enabling it will fix the issue, even the</span><br style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">
<span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"> fix will drop performance of some compute tests.</span><br>
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<p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"><br>
</span></p>
<p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;"><br>
</span></p>
<p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">Best Regards</span></p>
<p style="margin-top:0;margin-bottom:0"><span style="font-family: Calibri, Helvetica, sans-serif, EmojiFont, "Apple Color Emoji", "Segoe UI Emoji", NotoColorEmoji, "Segoe UI Symbol", "Android Emoji", EmojiSymbols; font-size: 14.6667px;">Rex</span></p>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Rex Zhu <Rex.Zhu@amd.com><br>
<b>Sent:</b> Friday, February 23, 2018 5:52 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> [PATCH 4/4] drm/amd/pp: Disable power containment on Fiji with compute workload</font>
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<div class="PlainText">disable power containment on Fiji in order to get better compute performance<br>
it is a temporary workaround. we can adjust power/current limit<br>
to satify compute request.<br>
<br>
Change-Id: I26389a3ff84e1f74e599541b44c0e62ce38a7345<br>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
---<br>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 7 +++++++<br>
1 file changed, 7 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
index a31d1a8..e725455 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
@@ -2782,6 +2782,8 @@ static int smu7_force_dpm_level(struct pp_hwmgr *hwmgr,<br>
<br>
smu7_set_power_profile_mode(hwmgr, &mode, 0);<br>
}<br>
+ if (hwmgr->chip_id == CHIP_FIJI)<br>
+ smu7_enable_power_containment(hwmgr);<br>
<br>
ret = smu7_unforce_dpm_levels(hwmgr);<br>
break;<br>
@@ -5032,6 +5034,9 @@ static void smu7_patch_compute_profile_mode(struct pp_hwmgr *hwmgr,<br>
uint32_t tmp, level;<br>
<br>
if (requst == PP_SMC_POWER_PROFILE_COMPUTE) {<br>
+ if (hwmgr->chip_id == CHIP_FIJI)<br>
+ smu7_disable_power_containment(hwmgr);<br>
+<br>
if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) {<br>
level = 0;<br>
tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask;<br>
@@ -5042,6 +5047,8 @@ static void smu7_patch_compute_profile_mode(struct pp_hwmgr *hwmgr,<br>
}<br>
} else if (hwmgr->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) {<br>
smu7_force_clock_level(hwmgr, PP_SCLK, data->dpm_level_enable_mask.sclk_dpm_enable_mask);<br>
+ if (hwmgr->chip_id == CHIP_FIJI)<br>
+ smu7_enable_power_containment(hwmgr);<br>
}<br>
}<br>
<br>
-- <br>
1.9.1<br>
<br>
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