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<p style="margin-top:0;margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu@amd.com><br>
<b>Sent:</b> Thursday, March 15, 2018 2:47:21 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> [PATCH] drm/amd/pp: Remove the cgs wrapper for notify smu version on APU</font>
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<div class="PlainText">Refine the commit f49e9bac191b066060a53d994f9c964fb71454f2<br>
drm/amd/pp: Get and save Rv smu version<br>
<br>
Change-Id: Iea668cc2161e5fcf339b408eb7eca1b028e26df2<br>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c | 5 -----<br>
drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c | 6 ++----<br>
drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 6 +++---<br>
3 files changed, 5 insertions(+), 12 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c<br>
index f2dd98d..37098c6 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c<br>
@@ -654,11 +654,6 @@ static int amdgpu_cgs_get_firmware_info(struct cgs_device *cgs_device,<br>
else<br>
strcpy(fw_name, "amdgpu/vega10_smc.bin");<br>
break;<br>
- case CHIP_CARRIZO:<br>
- case CHIP_STONEY:<br>
- case CHIP_RAVEN:<br>
- adev->pm.fw_version = info->version;<br>
- return 0;<br>
default:<br>
DRM_ERROR("SMC firmware not supported\n");<br>
return -EINVAL;<br>
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c<br>
index 6ee9822..bed229e 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu10_smumgr.c<br>
@@ -247,13 +247,11 @@ static int smu10_smu_fini(struct pp_hwmgr *hwmgr)<br>
<br>
static int smu10_start_smu(struct pp_hwmgr *hwmgr)<br>
{<br>
- struct cgs_firmware_info info = {0};<br>
+ struct amdgpu_device *adev = hwmgr->adev;<br>
<br>
smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion);<br>
hwmgr->smu_version = smu10_read_arg_from_smc(hwmgr);<br>
- info.version = hwmgr->smu_version >> 8;<br>
-<br>
- cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);<br>
+ adev->pm.fw_version = hwmgr->smu_version >> 8;<br>
<br>
if (smu10_verify_smc_interface(hwmgr))<br>
return -EINVAL;<br>
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
index 480deb2..8c49704 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
@@ -698,7 +698,8 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)<br>
{<br>
int ret = 0;<br>
uint32_t fw_to_check = 0;<br>
- struct cgs_firmware_info info = {0};<br>
+ struct amdgpu_device *adev = hwmgr->adev;<br>
+<br>
uint32_t index = SMN_MP1_SRAM_START_ADDR +<br>
SMU8_FIRMWARE_HEADER_LOCATION +<br>
offsetof(struct SMU8_Firmware_Header, Version);<br>
@@ -709,8 +710,7 @@ static int smu8_start_smu(struct pp_hwmgr *hwmgr)<br>
<br>
cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index);<br>
hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA);<br>
- info.version = hwmgr->smu_version >> 8;<br>
- cgs_get_firmware_info(hwmgr->device, CGS_UCODE_ID_SMU, &info);<br>
+ adev->pm.fw_version = hwmgr->smu_version >> 8;<br>
<br>
fw_to_check = UCODE_ID_RLC_G_MASK |<br>
UCODE_ID_SDMA0_MASK |<br>
-- <br>
1.9.1<br>
<br>
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