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    <div class="moz-cite-prefix">Quoting Alex:<br>
      <blockquote type="cite">
        <pre wrap="">Regardless of which scenarios we need to support, I think we also need
to really plumb this through to mesa however since user space is who
ultimately requests the location.  Overriding it in the kernel gets
tricky and can lead to ping-ponging as others have noted.  Better to
have user space know what chips support it or not and request display
buffers in GTT or VRAM from the start.</pre>
      </blockquote>
      And I completely agree with Alex here. So overriding the domain in
      the kernel is a serious NAK from my side as well.<br>
      <br>
      Please implement the necessary bits in Mesa, shouldn't be more
      than a few lines of code anyway.<br>
      <br>
      Regards,<br>
      Christian.<br>
      <br>
      Am 19.03.2018 um 20:42 schrieb Li, Samuel:<br>
    </div>
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        <p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496">Agreed.<o:p></o:p></span></p>
        <p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496"><o:p> </o:p></span></p>
        <p class="MsoNormal">>I think that the consensus with Alex
          and me is that we should avoid exactly that.<br>
          Christian, Alex’s concern is about ping-pong, not about the
          preferred domain. <br>
          <br>
          <span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496"><o:p></o:p></span></p>
        <p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496">Regards,<o:p></o:p></span></p>
        <p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496">Samuel
            Li<o:p></o:p></span></p>
        <p class="MsoNormal"><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#2F5496"><o:p> </o:p></span></p>
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              <p class="MsoNormal"><b><span
                    style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span
style="font-size:11.0pt;font-family:"Calibri",sans-serif">
                  Marek Olšák [<a class="moz-txt-link-freetext" href="mailto:maraeo@gmail.com">mailto:maraeo@gmail.com</a>]
                  <br>
                  <b>Sent:</b> Monday, March 19, 2018 3:39 PM<br>
                  <b>To:</b> Koenig, Christian
                  <a class="moz-txt-link-rfc2396E" href="mailto:Christian.Koenig@amd.com"><Christian.Koenig@amd.com></a><br>
                  <b>Cc:</b> Li, Samuel <a class="moz-txt-link-rfc2396E" href="mailto:Samuel.Li@amd.com"><Samuel.Li@amd.com></a>;
                  Michel Dänzer <a class="moz-txt-link-rfc2396E" href="mailto:michel@daenzer.net"><michel@daenzer.net></a>; Alex Deucher
                  <a class="moz-txt-link-rfc2396E" href="mailto:alexdeucher@gmail.com"><alexdeucher@gmail.com></a>; amd-gfx list
                  <a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"><amd-gfx@lists.freedesktop.org></a><br>
                  <b>Subject:</b> Re: [PATCH 1/2] drm/amdgpu: Enable
                  scatter gather display support<o:p></o:p></span></p>
            </div>
          </div>
          <p class="MsoNormal"><o:p> </o:p></p>
          <div>
            <div>
              <div>
                <p class="MsoNormal">On Mon, Mar 19, 2018 at 3:27 PM,
                  Christian König <<a
                    href="mailto:christian.koenig@amd.com"
                    target="_blank" moz-do-not-send="true">christian.koenig@amd.com</a>>
                  wrote:<o:p></o:p></p>
                <blockquote style="border:none;border-left:solid #CCCCCC
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                  <p class="MsoNormal">I think that the consensus with
                    Alex and me is that we should avoid exactly that.<br>
                    <br>
                    Overriding the preferred domain in the kernel is a
                    no-go for that patch set, so please implement the
                    discussed changes in Mesa.<o:p></o:p></p>
                </blockquote>
                <div>
                  <p class="MsoNormal"><o:p> </o:p></p>
                </div>
                <div>
                  <p class="MsoNormal">I don't see how Mesa can make a
                    smarter decision than the kernel. If you overwrite
                    the preferred domain of the buffer in the kernel,
                    there will be no ping-ponging between domains. Mesa
                    never changes the initial preferred domain.<o:p></o:p></p>
                </div>
                <div>
                  <p class="MsoNormal"><o:p> </o:p></p>
                </div>
                <div>
                  <p class="MsoNormal">Marek<o:p></o:p></p>
                </div>
                <div>
                  <p class="MsoNormal"><o:p> </o:p></p>
                </div>
                <div>
                  <p class="MsoNormal"> <o:p></o:p></p>
                </div>
                <blockquote style="border:none;border-left:solid #CCCCCC
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                  <p class="MsoNormal"><br>
                    Regards,<br>
                    Christian.<o:p></o:p></p>
                  <div>
                    <div>
                      <p class="MsoNormal"><br>
                        <br>
                        Am 19.03.2018 um 20:22 schrieb Li, Samuel:<o:p></o:p></p>
                      <blockquote style="border:none;border-left:solid
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                        <p class="MsoNormal"
                          style="margin-bottom:12.0pt">I agree with
                          Marek/Michel: since kernel sets the domain
                          before scanning out, it shall update the
                          preferred domain here too.<br>
                          <br>
                          Regards,<br>
                          Samuel Li<br>
                          <br>
                          <o:p></o:p></p>
                        <blockquote style="border:none;border-left:solid
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                          <p class="MsoNormal">-----Original
                            Message-----<br>
                            From: Koenig, Christian<br>
                            Sent: Thursday, March 08, 2018 4:07 AM<br>
                            To: Michel Dänzer <<a
                              href="mailto:michel@daenzer.net"
                              target="_blank" moz-do-not-send="true">michel@daenzer.net</a>>;
                            Li, Samuel<br>
                            <<a href="mailto:Samuel.Li@amd.com"
                              target="_blank" moz-do-not-send="true">Samuel.Li@amd.com</a>>;
                            Alex Deucher <<a
                              href="mailto:alexdeucher@gmail.com"
                              target="_blank" moz-do-not-send="true">alexdeucher@gmail.com</a>><br>
                            Cc: amd-gfx list <<a
                              href="mailto:amd-gfx@lists.freedesktop.org"
                              target="_blank" moz-do-not-send="true">amd-gfx@lists.freedesktop.org</a>><br>
                            Subject: Re: [PATCH 1/2] drm/amdgpu: Enable
                            scatter gather display support<br>
                            <br>
                            Am 08.03.2018 um 09:35 schrieb Michel
                            Dänzer:<o:p></o:p></p>
                          <blockquote
                            style="border:none;border-left:solid #CCCCCC
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                            <p class="MsoNormal">On 2018-03-07 10:47 AM,
                              Christian König wrote:<o:p></o:p></p>
                            <blockquote
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                              <p class="MsoNormal">Am 07.03.2018 um
                                09:42 schrieb Michel Dänzer:<o:p></o:p></p>
                              <blockquote
                                style="border:none;border-left:solid
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                                6.0pt;margin-left:4.8pt;margin-right:0in">
                                <p class="MsoNormal"
                                  style="margin-bottom:12.0pt">On
                                  2018-03-06 07:23 PM, Christian König
                                  wrote:<o:p></o:p></p>
                                <blockquote
                                  style="border:none;border-left:solid
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                                  <p class="MsoNormal">E.g. the last
                                    time I tested it placing things into
                                    GTT still<br>
                                    resulted in quite a performance
                                    penalty for rendering.<o:p></o:p></p>
                                </blockquote>
                                <p class="MsoNormal">FWIW, I think the
                                  penalty is most likely IOMMU related.
                                  Last time I<br>
                                  tested, I couldn't measure a big
                                  difference with IOMMU disabled.<o:p></o:p></p>
                              </blockquote>
                              <p class="MsoNormal">No, the penalty I'm
                                talking about came from the ping/pong we
                                did with<br>
                                the scanout buffers.<br>
                                <br>
                                See when I tested this the DDX and Mesa
                                where unmodified, so both<br>
                                still assumed VRAM as placement for
                                scanout BOs, but the kernel<br>
                                forced scanout BOs into GTT for testing.<br>
                                <br>
                                So what happened was that on scanout we
                                moved the VRAM BO to GTT<o:p></o:p></p>
                            </blockquote>
                          </blockquote>
                          <p class="MsoNormal">and<o:p></o:p></p>
                          <blockquote
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                            <blockquote
                              style="border:none;border-left:solid
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                              <p class="MsoNormal">after unpinning it on
                                the first command submission which used
                                the BO<br>
                                we moved it back to VRAM again.<o:p></o:p></p>
                            </blockquote>
                            <p class="MsoNormal">In the meantime, I've
                              had the same idea as Marek: Can't the
                              kernel<br>
                              driver simply change the BO's preferred
                              domain to GTT when scanning<br>
                              out from it? Then it won't move back to
                              VRAM.<o:p></o:p></p>
                          </blockquote>
                          <p class="MsoNormal">Yes, I've considered this
                            as well.<br>
                            <br>
                            But I think making the decision in Mesa is
                            the cleaner approach.<br>
                            <br>
                            E.g. so far we only override the placement
                            decision of userspace for two<br>
                            reasons:<br>
                            1. We where running out of memory in VRAM.<br>
                            2. We have a hardware restriction which
                            makes VRAM usage mandatory.<br>
                            <br>
                            And even then we never adjust the placement
                            permanently, we just<br>
                            temporary moved the buffer where it was
                            needed and moved it back after<br>
                            the operation completed.<br>
                            <br>
                            Additional to that Mesa might want to set
                            even more flags and/or changes<br>
                            it's behavior. E.g. use a tilling mode which
                            both importer and export in an<br>
                            A+A laptop understands etc...<br>
                            <br>
                            Regards,<br>
                            Christian.<o:p></o:p></p>
                        </blockquote>
                      </blockquote>
                      <p class="MsoNormal"><br>
                        _______________________________________________<br>
                        amd-gfx mailing list<br>
                        <a href="mailto:amd-gfx@lists.freedesktop.org"
                          target="_blank" moz-do-not-send="true">amd-gfx@lists.freedesktop.org</a><br>
                        <a
                          href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx"
                          target="_blank" moz-do-not-send="true">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><o:p></o:p></p>
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              <p class="MsoNormal"><o:p> </o:p></p>
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      <br>
      <pre wrap="">_______________________________________________
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</pre>
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