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<p style="margin-top:0;margin-bottom:0">Series is:</p>
<p style="margin-top:0;margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu@amd.com><br>
<b>Sent:</b> Wednesday, March 21, 2018 1:51:28 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> [PATCH 2/2] drm/amd/pp: Register smu irq for legacy asics</font>
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<div class="PlainText">Change-Id: I1927175adfecbcfe99908f06959f8c0a507d3278<br>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
---<br>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 33 ++++++++++++++++++++++++<br>
1 file changed, 33 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
index 8a81360..5323f74 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
@@ -3996,8 +3996,41 @@ static int smu7_set_max_fan_rpm_output(struct pp_hwmgr *hwmgr, uint16_t us_max_f<br>
PPSMC_MSG_SetFanRpmMax, us_max_fan_rpm);<br>
}<br>
<br>
+static const struct amdgpu_irq_src_funcs smu7_irq_funcs = {<br>
+ .process = phm_irq_process,<br>
+};<br>
+<br>
static int smu7_register_irq_handlers(struct pp_hwmgr *hwmgr)<br>
{<br>
+ struct amdgpu_irq_src *source =<br>
+ kzalloc(sizeof(struct amdgpu_irq_src), GFP_KERNEL);<br>
+<br>
+ if (!source)<br>
+ return -ENOMEM;<br>
+<br>
+ source->funcs = &smu7_irq_funcs;<br>
+<br>
+ if (hwmgr->thermal_controller.ucType ==<br>
+ hwmgr->default_thermal_ctrl_type ||<br>
+ hwmgr->thermal_controller.ucType ==<br>
+ ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL) {<br>
+<br>
+ amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev),<br>
+ AMDGPU_IH_CLIENTID_LEGACY,<br>
+ 230,<br>
+ source);<br>
+ amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev),<br>
+ AMDGPU_IH_CLIENTID_LEGACY,<br>
+ 231,<br>
+ source);<br>
+ }<br>
+<br>
+ /* Register CTF(GPIO_19) interrupt */<br>
+ amdgpu_irq_add_id((struct amdgpu_device *)(hwmgr->adev),<br>
+ AMDGPU_IH_CLIENTID_LEGACY,<br>
+ 83,<br>
+ source);<br>
+<br>
return 0;<br>
}<br>
<br>
-- <br>
1.9.1<br>
<br>
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