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<p style="margin-top:0;margin-bottom:0">hi Alex,</p>
<p style="margin-top:0;margin-bottom:0"><br>
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<p style="margin-top:0;margin-bottom:0">I have sent the patch with "Add: DOC " and last patch to 
<span>amd-gfx@lists.freedesktop.org already.</span></p>
<p style="margin-top:0;margin-bottom:0"><span>please check.</span></p>
<p style="margin-top:0;margin-bottom:0"><span><br>
</span></p>
<p style="margin-top:0;margin-bottom:0"><span>Thanks!</span></p>
<p style="margin-top:0;margin-bottom:0"><span><br>
</span></p>
<p style="margin-top:0;margin-bottom:0"><span>Wei</span><br>
</p>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Alex Deucher <alexdeucher@gmail.com><br>
<b>Sent:</b> 23 April 2018 16:06:16<br>
<b>To:</b> Lu, Wei<br>
<b>Cc:</b> amd-gfx list<br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: change pp_dpm clk/mclk/pcie input format</font>
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<div class="PlainText">On Thu, Apr 19, 2018 at 4:51 PM, welu <wei.lu2@amd.com> wrote:<br>
> 1. support more than 8 values when setting get_pp_dpm_mclk/<br>
> sclk/pcie, the former design just parse command format like<br>
> "echo xxxx > pp_dpm_sclk" and current can parse "echo xx xxx<br>
>  xxxx > pp_dpm_sclk" whose operation is more user-friendly<br>
> and convinent and can offer more values;<br>
> 2. be compatible with former design like "xx".<br>
> Bug:KFD-385<br>
<br>
Please update the documentation labeled "DOC: pp_dpm_sclk pp_dpm_mclk<br>
pp_dpm_pcie", With that fixed, patch is:<br>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
<br>
><br>
> Change-Id: Id7d95ce45f4ee0564b18ebcfc16976f1a5c6bf72<br>
> Signed-off-by: welu <wei.lu2@amd.com><br>
> ---<br>
>  drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 95 ++++++++++++++++++++--------------<br>
>  1 file changed, 55 insertions(+), 40 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
> index 744f105..58f46f9 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
> @@ -466,23 +466,27 @@ static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,<br>
>         struct amdgpu_device *adev = ddev->dev_private;<br>
>         int ret;<br>
>         long level;<br>
> -       uint32_t i, mask = 0;<br>
> -       char sub_str[2];<br>
> +       uint32_t mask = 0;<br>
> +       char *sub_str = NULL;<br>
> +       char *tmp;<br>
> +       char buf_cpy[count];<br>
> +       const char delimiter[3] = {' ', '\n', '\0'};<br>
><br>
> -       for (i = 0; i < strlen(buf); i++) {<br>
> -               if (*(buf + i) == '\n')<br>
> -                       continue;<br>
> -               sub_str[0] = *(buf + i);<br>
> -               sub_str[1] = '\0';<br>
> -               ret = kstrtol(sub_str, 0, &level);<br>
> +       memcpy(buf_cpy, buf, count+1);<br>
> +       tmp = buf_cpy;<br>
> +       while (tmp[0]) {<br>
> +               sub_str =  strsep(&tmp, delimiter);<br>
> +               if (strlen(sub_str)) {<br>
> +                       ret = kstrtol(sub_str, 0, &level);<br>
><br>
> -               if (ret) {<br>
> -                       count = -EINVAL;<br>
> -                       goto fail;<br>
> -               }<br>
> -               mask |= 1 << level;<br>
> +                       if (ret) {<br>
> +                               count = -EINVAL;<br>
> +                               goto fail;<br>
> +                       }<br>
> +                       mask |= 1 << level;<br>
> +               } else<br>
> +                       break;<br>
>         }<br>
> -<br>
>         if (adev->powerplay.pp_funcs->force_clock_level)<br>
>                 amdgpu_dpm_force_clock_level(adev, PP_SCLK, mask);<br>
><br>
> @@ -512,21 +516,26 @@ static ssize_t amdgpu_set_pp_dpm_mclk(struct device *dev,<br>
>         struct amdgpu_device *adev = ddev->dev_private;<br>
>         int ret;<br>
>         long level;<br>
> -       uint32_t i, mask = 0;<br>
> -       char sub_str[2];<br>
> +       uint32_t mask = 0;<br>
> +       char *sub_str = NULL;<br>
> +       char *tmp;<br>
> +       char buf_cpy[count];<br>
> +       const char delimiter[3] = {' ', '\n', '\0'};<br>
><br>
> -       for (i = 0; i < strlen(buf); i++) {<br>
> -               if (*(buf + i) == '\n')<br>
> -                       continue;<br>
> -               sub_str[0] = *(buf + i);<br>
> -               sub_str[1] = '\0';<br>
> -               ret = kstrtol(sub_str, 0, &level);<br>
> +       memcpy(buf_cpy, buf, count+1);<br>
> +       tmp = buf_cpy;<br>
> +       while (tmp[0]) {<br>
> +               sub_str =  strsep(&tmp, delimiter);<br>
> +               if (strlen(sub_str)) {<br>
> +                       ret = kstrtol(sub_str, 0, &level);<br>
><br>
> -               if (ret) {<br>
> -                       count = -EINVAL;<br>
> -                       goto fail;<br>
> -               }<br>
> -               mask |= 1 << level;<br>
> +                       if (ret) {<br>
> +                               count = -EINVAL;<br>
> +                               goto fail;<br>
> +                       }<br>
> +                       mask |= 1 << level;<br>
> +               } else<br>
> +                       break;<br>
>         }<br>
>         if (adev->powerplay.pp_funcs->force_clock_level)<br>
>                 amdgpu_dpm_force_clock_level(adev, PP_MCLK, mask);<br>
> @@ -557,21 +566,27 @@ static ssize_t amdgpu_set_pp_dpm_pcie(struct device *dev,<br>
>         struct amdgpu_device *adev = ddev->dev_private;<br>
>         int ret;<br>
>         long level;<br>
> -       uint32_t i, mask = 0;<br>
> -       char sub_str[2];<br>
> +       uint32_t mask = 0;<br>
> +       char *sub_str = NULL;<br>
> +       char *tmp;<br>
> +       char buf_cpy[count];<br>
> +       const char delimiter[3] = {' ', '\n', '\0'};<br>
><br>
> -       for (i = 0; i < strlen(buf); i++) {<br>
> -               if (*(buf + i) == '\n')<br>
> -                       continue;<br>
> -               sub_str[0] = *(buf + i);<br>
> -               sub_str[1] = '\0';<br>
> -               ret = kstrtol(sub_str, 0, &level);<br>
> +       memcpy(buf_cpy, buf, count+1);<br>
> +       tmp = buf_cpy;<br>
><br>
> -               if (ret) {<br>
> -                       count = -EINVAL;<br>
> -                       goto fail;<br>
> -               }<br>
> -               mask |= 1 << level;<br>
> +       while (tmp[0]) {<br>
> +               sub_str =  strsep(&tmp, delimiter);<br>
> +               if (strlen(sub_str)) {<br>
> +                       ret = kstrtol(sub_str, 0, &level);<br>
> +<br>
> +                       if (ret) {<br>
> +                               count = -EINVAL;<br>
> +                               goto fail;<br>
> +                       }<br>
> +                       mask |= 1 << level;<br>
> +               } else<br>
> +                       break;<br>
>         }<br>
>         if (adev->powerplay.pp_funcs->force_clock_level)<br>
>                 amdgpu_dpm_force_clock_level(adev, PP_PCIE, mask);<br>
> --<br>
> 2.7.4<br>
><br>
> _______________________________________________<br>
> amd-gfx mailing list<br>
> amd-gfx@lists.freedesktop.org<br>
> <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><br>
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