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<p style="margin-top:0;margin-bottom:0"><font size="2"><span style="font-size:11pt;">>Still has risk for s3, we would better not put PG disabling (gfxoff) behind of CG<br>
>disabling, even here is SMC clockgating. It is to avoid any MMU using when<br>
>gfx is in "off" state.</span></font><br>
</p>
<br>
<p style="margin-top:0;margin-bottom:0">I think logically we need to power on/off GFX ip through SMU, so first ungate SMU block first.</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">Currently, it is not a big deal, because SMU don't support CG/PG on all legacy asics.</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">Best Regards</p>
<p style="margin-top:0;margin-bottom:0">Rex<br>
</p>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" color="#000000" face="Calibri, sans-serif"><b>From:</b> Huang Rui <ray.huang@amd.com><br>
<b>Sent:</b> Wednesday, June 6, 2018 10:33 AM<br>
<b>To:</b> Zhu, Rex<br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH 2/2] drm/amdgpu: Make gfx_off control by GFX ip</font>
<div> </div>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">On Tue, Jun 05, 2018 at 07:51:17PM +0800, Rex Zhu wrote:<br>
> v3: 1. Delete the dead gfx off code in powerplay late_init.<br>
> 2. Revert v2.<br>
> 3. call smu to power on gfx at the begin of ip_suspend/device_fini<br>
> 4. only power off gfx ip in the end of gfx power gate function<br>
> v2: Delete the dead gfx off code in ip_suspend.<br>
> <br>
> gfx off should be controlled by GFX IP.<br>
> Powerplay only export interface to gfx ip.<br>
> This logic is same as uvd/vce cg/pg.<br>
> <br>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 ++++++------<br>
> drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++++<br>
> drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8 --------<br>
> drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 4 ++--<br>
> 4 files changed, 12 insertions(+), 16 deletions(-)<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> index df6ef9c..ee87fea 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> @@ -1830,6 +1830,8 @@ static int amdgpu_device_ip_fini(struct amdgpu_device *adev)<br>
> adev->ip_blocks[i].version->funcs->name, r);<br>
> return r;<br>
> }<br>
> + if (adev->powerplay.pp_funcs->set_powergating_by_smu)<br>
> + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);<br>
> r = adev->ip_blocks[i].version->funcs->hw_fini((void *)adev);<br>
> /* XXX handle errors */<br>
> if (r) {<br>
> @@ -1940,12 +1942,6 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)<br>
> if (amdgpu_sriov_vf(adev))<br>
> amdgpu_virt_request_full_gpu(adev, false);<br>
> <br>
> - /* ungate SMC block powergating */<br>
> - if (adev->powerplay.pp_feature & PP_GFXOFF_MASK)<br>
> - amdgpu_device_ip_set_powergating_state(adev,<br>
> - AMD_IP_BLOCK_TYPE_SMC,<br>
> - AMD_CG_STATE_UNGATE);<br>
> -<br>
> /* ungate SMC block first */<br>
> r = amdgpu_device_ip_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_SMC,<br>
> AMD_CG_STATE_UNGATE);<br>
> @@ -1953,6 +1949,10 @@ int amdgpu_device_ip_suspend(struct amdgpu_device *adev)<br>
> DRM_ERROR("set_clockgating_state(ungate) SMC failed %d\n", r);<br>
> }<br>
> <br>
> + /* call smu to disable gfx off feature first when suspend */<br>
> + if (adev->powerplay.pp_funcs->set_powergating_by_smu)<br>
> + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, false);<br>
> +<br>
<br>
Still has risk for s3, we would better not put PG disabling (gfxoff) behind of CG<br>
disabling, even here is SMC clockgating. It is to avoid any MMU using when<br>
gfx is in "off" state.<br>
<br>
Thanks,<br>
Ray<br>
<br>
<br>
> for (i = adev->num_ip_blocks - 1; i >= 0; i--) {<br>
> if (!adev->ip_blocks[i].status.valid)<br>
> continue;<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c<br>
> index c382969..43c8023 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c<br>
> @@ -3712,6 +3712,10 @@ static int gfx_v9_0_set_powergating_state(void *handle,<br>
> <br>
> /* update mgcg state */<br>
> gfx_v9_0_update_gfx_mg_power_gating(adev, enable);<br>
> +<br>
> + /* set gfx off through smu */<br>
> + if (enable && adev->powerplay.pp_funcs->set_powergating_by_smu)<br>
> + amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_GFX, true);<br>
> break;<br>
> default:<br>
> break;<br>
> diff --git a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c<br>
> index fe3ed8c..8bb3a9a 100644<br>
> --- a/drivers/gpu/drm/amd/powerplay/amd_powerplay.c<br>
> +++ b/drivers/gpu/drm/amd/powerplay/amd_powerplay.c<br>
> @@ -180,7 +180,6 @@ static int pp_late_init(void *handle)<br>
> {<br>
> struct amdgpu_device *adev = handle;<br>
> struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;<br>
> - int ret;<br>
> <br>
> if (hwmgr && hwmgr->pm_en) {<br>
> mutex_lock(&hwmgr->smu_lock);<br>
> @@ -191,13 +190,6 @@ static int pp_late_init(void *handle)<br>
> if (adev->pm.smu_prv_buffer_size != 0)<br>
> pp_reserve_vram_for_smu(adev);<br>
> <br>
> - if (hwmgr->hwmgr_func->gfx_off_control &&<br>
> - (hwmgr->feature_mask & PP_GFXOFF_MASK)) {<br>
> - ret = hwmgr->hwmgr_func->gfx_off_control(hwmgr, true);<br>
> - if (ret)<br>
> - pr_err("gfx off enabling failed!\n");<br>
> - }<br>
> -<br>
> return 0;<br>
> }<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c<br>
> index b9e6dfb..5abae28 100644<br>
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c<br>
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c<br>
> @@ -314,7 +314,7 @@ static int smu10_disable_gfx_off(struct pp_hwmgr *hwmgr)<br>
> <br>
> static int smu10_disable_dpm_tasks(struct pp_hwmgr *hwmgr)<br>
> {<br>
> - return smu10_disable_gfx_off(hwmgr);<br>
> + return 0;<br>
> }<br>
> <br>
> static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr)<br>
> @@ -329,7 +329,7 @@ static int smu10_enable_gfx_off(struct pp_hwmgr *hwmgr)<br>
> <br>
> static int smu10_enable_dpm_tasks(struct pp_hwmgr *hwmgr)<br>
> {<br>
> - return smu10_enable_gfx_off(hwmgr);<br>
> + return 0;<br>
> }<br>
> <br>
> static int smu10_gfx_off_control(struct pp_hwmgr *hwmgr, bool enable)<br>
> -- <br>
> 1.9.1<br>
> <br>
> _______________________________________________<br>
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