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<div class="moz-cite-prefix">On 06/13/2018 08:30 AM, Jan Vesely wrote:<br>
</div>
<blockquote type="cite" cite="mid:CABE_ZV06N+_JcnqJMU=78DKNwGMwxpEsg7Tr0Xgw0x=-hyc6bw@mail.gmail.com">
<div dir="ltr">Hi,
<div><br>
</div>
<div>can you please improve the commit message?</div>
<div>seeing "Revert $HASH" conveys zero information about the code change.</div>
<div>I'm sorry for bringing this up again, but following AMDGPU/Radeon driver development is an exercise in frustration for anyone who is not on AMD's payroll.</div>
<div>git commit logs like:</div>
<div>"revert XYZ" or "fix bug #123" make it really cumbersome to actually look at history and pick interesting/breaking commits.</div>
<div><br>
</div>
<div>thanks,</div>
<div>Jan</div>
</div>
</blockquote>
Just a polite agreement and seconding here. The abundance of acronyms is confusing but understandable, and the weekly dumps of DC updates show not a bit of dialog about how or why the patches were written. Although I read the rest of the emails to the list,
I can usually just mark that set of 18 to 30 mails as read and send it straight to the trash. It's too much work to glean useful information from them.<br>
<br>
Regards,<br>
Will<br>
<br>
<blockquote type="cite" cite="mid:CABE_ZV06N+_JcnqJMU=78DKNwGMwxpEsg7Tr0Xgw0x=-hyc6bw@mail.gmail.com">
<div class="gmail_extra"><br>
<div class="gmail_quote">On Wed, Jun 13, 2018 at 8:46 AM, Christian König <span dir="ltr">
<<a href="mailto:ckoenig.leichtzumerken@gmail.com" target="_blank" moz-do-not-send="true">ckoenig.leichtzumerken@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<span class="">Am 13.06.2018 um 13:40 schrieb Rex Zhu:<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
Move the CG enablement out of delay worker thread.<br>
<br>
1. CG/PG enablement are part of gpu hw ip initialize, we should<br>
wait for them complete. otherwise, there are some potential conflicts,<br>
for example, Suspend and CG enablement concurrently.<br>
2. better run ib test after hw initialize completely. That is to say,<br>
ib test should be after CG/PG enablement. otherwise, the test will<br>
not cover the cg/pg/poweroff enable case.<br>
<br>
Signed-off-by: Rex Zhu <<a href="mailto:Rex.Zhu@amd.com" target="_blank" moz-do-not-send="true">Rex.Zhu@amd.com</a>><br>
</blockquote>
<br>
</span>Yeah, that thought came to my mind as well.<br>
<br>
Essentially the IB test should simulate a submission from userspace to make sure that the stack is working as expected. I think it was just moved before CG/PG to avoid issues with that, which is actually not very clever.<br>
<br>
Patch is Reviewed-by: Christian König <<a href="mailto:christian.koenig@amd.com" target="_blank" moz-do-not-send="true">christian.koenig@amd.com</a>>, but there could be some fallout we could need to deal with.<br>
<br>
Thanks,<br>
Christian.
<div class="HOEnZb">
<div class="h5"><br>
<br>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
---<br>
drivers/gpu/drm/amd/amdgpu/amd<wbr>gpu_device.c | 14 ++++++++------<br>
1 file changed, 8 insertions(+), 6 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/a<wbr>mdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/a<wbr>mdgpu_device.c<br>
index 9647f54..90b78c7 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/a<wbr>mdgpu_device.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/a<wbr>mdgpu_device.c<br>
@@ -1709,10 +1709,6 @@ static int amdgpu_device_ip_late_set_cg_s<wbr>tate(struct amdgpu_device *adev)<br>
if (amdgpu_emu_mode == 1)<br>
return 0;<br>
- r = amdgpu_ib_ring_tests(adev);<br>
- if (r)<br>
- DRM_ERROR("ib ring test failed (%d).\n", r);<br>
-<br>
for (i = 0; i < adev->num_ip_blocks; i++) {<br>
if (!adev->ip_blocks[i].<a href="https://nam01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fstatus.va&data=02%7C01%7C%7C3869c12d0e1d489d0f1b08d5d131d2d5%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C636644934270231216&sdata=U37xx4d4KwmIMbYBRB2V8ueYMIPTQx6t%2Bm90qpR60Ek%3D&reserved=0" originalsrc="http://status.va" shash="Bmbd5zfpQ5zs1WO+KQKtY6RaYRDx2LY6KRkT2iw91eyPTGsskXFHLmGiTTM1C4pBV8H3HQV3M3uhpIWbia7UvJdRe4p4Q2qEMHhxc7VPCIMy7/TPf14gmZRNNmf2lt6DPF7XXQRITkZIFQJR6ZCN6jCpdO/THnYYZY0vuhT0NJc=" moz-do-not-send="true">status.va</a><wbr>lid)<br>
continue;<br>
@@ -1793,6 +1789,9 @@ static int amdgpu_device_ip_late_init(str<wbr>uct amdgpu_device *adev)<br>
}<br>
}<br>
+ amdgpu_device_ip_late_set_cg_<wbr>state(adev);<br>
+ amdgpu_device_ip_late_set_pg_<wbr>state(adev);<br>
+<br>
queue_delayed_work(system_wq, &adev->late_init_work,<br>
msecs_to_jiffies(AMDGPU_RESUM<wbr>E_MS));<br>
@@ -1921,8 +1920,11 @@ static void amdgpu_device_ip_late_init_fun<wbr>c_handler(struct work_struct *work)<br>
{<br>
struct amdgpu_device *adev =<br>
container_of(work, struct amdgpu_device, <a href="https://nam01.safelinks.protection.outlook.com/?url=http%3A%2F%2Flate_init_work.work&data=02%7C01%7C%7C3869c12d0e1d489d0f1b08d5d131d2d5%7C84df9e7fe9f640afb435aaaaaaaaaaaa%7C1%7C0%7C636644934270387474&sdata=R3%2BYpuk333iEpjzcc8lLjr6NKPi74VximJcFAGCHqUc%3D&reserved=0" originalsrc="http://late_init_work.work" shash="pnvDg0+xVctnONOZjF3G5nmA9otduyYc1VZtORAeobA5SqZvaOQmMdlN+s7P5mRk6Lvi8uvZI2epzc0wfQ58qMCieSMAn+6g5lPrlx/92ZACofWJR0S/ZH6q6omC2OXRcOO2mRMGoKOa8vtRGpJqRZbGJrJf7S+60nx+XhzxORI=" rel="noreferrer" target="_blank" moz-do-not-send="true">
late_init_work.work</a>);<br>
- amdgpu_device_ip_late_set_cg_<wbr>state(adev);<br>
- amdgpu_device_ip_late_set_pg_<wbr>state(adev);<br>
+ int r;<br>
+<br>
+ r = amdgpu_ib_ring_tests(adev);<br>
+ if (r)<br>
+ DRM_ERROR("ib ring test failed (%d).\n", r);<br>
}<br>
/**<br>
</blockquote>
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