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<p>For one UVD instance case,:<br>
</p>
<p><br>
</p>
<p><i>In function</i> amdgpu_driver_load_kms, all <font size="2"><span
style="font-size:11pt;">ring->me should be set to zero.</span></font><br>
<b> adev = kzalloc(sizeof(struct amdgpu_device), GFP_KERNEL);</b></p>
<p><br>
</p>
<p>For two UVD instances cases:</p>
<p>static void uvd_v7_0_set_ring_funcs(struct amdgpu_device *adev)<br>
..<br>
for (i = 0; i < adev->uvd.num_uvd_inst; i++) {<br>
<b> adev->uvd.inst[i].ring.me = i;</b><br>
<br>
static void uvd_v7_0_set_enc_ring_funcs(struct amdgpu_device
*adev)<br>
</p>
for (j = 0; j < adev->uvd.num_uvd_inst; j++) {<br>
<b>adev->uvd.inst[j].ring_enc[i].me = j;</b><br>
<br>
uvd_v4_2_early_init in uvd_v4_2.c adev->uvd.num_uvd_inst = 1;<br>
uvd_v5_0_early_init in uvd_v5_0.c adev->uvd.num_uvd_inst = 1;<br>
uvd_v6_0_early_init in uvd_v6_0.c adev->uvd.num_uvd_inst = 1;<br>
uvd_v7_0_early_init in uvd_v7_0.c <br>
if (adev->asic_type == CHIP_VEGA20)<br>
<b>adev->uvd.num_uvd_inst =
UVD7_MAX_HW_INSTANCES_VEGA20;/*2*/</b><br>
else<br>
<b>adev->uvd.num_uvd_inst = 1;</b><br>
<br>
<br>
I didn't know when ring->me is set to 2. Maybe there is some
leakage somewhere.<br>
<br>
Best regards!<br>
<br>
James zhu<br>
<br>
<div class="moz-cite-prefix">On 2018-06-25 01:29 PM, Deucher,
Alexander wrote:<br>
</div>
<blockquote type="cite"
cite="mid:BN6PR12MB1809E207A784F6EE6D79239AF74A0@BN6PR12MB1809.namprd12.prod.outlook.com">
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<p style="margin-top:0;margin-bottom:0">Odd. The structure
should be 0 initialized. Does this patch help?</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">Alex<br>
</p>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
face="Calibri, sans-serif" color="#000000"><b>From:</b>
Timothy Pearson <a class="moz-txt-link-rfc2396E" href="mailto:tpearson@raptorengineering.com"><tpearson@raptorengineering.com></a><br>
<b>Sent:</b> Monday, June 25, 2018 11:53:12 AM<br>
<b>To:</b> Zhu, James<br>
<b>Cc:</b> <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>; Deucher, Alexander;
Zhou, David(ChunMing); Koenig, Christian<br>
<b>Subject:</b> Re: [PATCH] Increase AMDGPU_MAX_UVD_INSTANCES
to 3</font>
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<div class="BodyFragment"><font size="2"><span
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<div class="PlainText">n 06/25/2018 09:46 AM, James Zhu
wrote:<br>
> <br>
> <br>
> On 2018-06-23 08:02 PM, Timothy Pearson wrote:<br>
>> amdgpu_fence_driver_start_ring() attempts to
access<br>
>> UVD instance 2 during setup, while the existing
UVD<br>
>> instance count only allows instances 0 and 1.<br>
>><br>
>> Increase AMDGPU_MAX_UVD_INSTANCES by one to avoid
the<br>
>> invalid array access.<br>
>><br>
>> Caught by UBSAN.<br>
> Hi Timothy,<br>
> <br>
> From design of view, it is not right to just change<br>
> AMDGPU_MAX_UVD_INSTANCES to 3.<br>
> <br>
> Could you tell me some detail of UBSAN test and
attach the dmesg also?<br>
<br>
Definitely, was looking for some feedback from anyone
knowing more about<br>
the internals of the UVD system.<br>
<br>
What's happening is that "ring->me" in
amdgpu_fence_driver_start_ring()<br>
(drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:379) is set to
a value of<br>
"2". The overall dmesg is otherwise uninteresting, but I
can try to<br>
grab the UBSAN output if needed.<br>
<br>
-- <br>
Timothy Pearson<br>
Raptor Engineering<br>
+1 (415) 727-8645 (direct line)<br>
+1 (512) 690-0200 (switchboard)<br>
<a href="https://www.raptorengineering.com"
moz-do-not-send="true">https://www.raptorengineering.com</a><br>
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