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<p style="margin-top:0;margin-bottom:0">Hi Alex,</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0">IP blocks indexes are not fixed. What's your idea to list them? By asic family?</p>
<p style="margin-top:0;margin-bottom:0"><br>
</p>
<p style="margin-top:0;margin-bottom:0"></p>
<div>enum amd_ip_block_type {<br>
AMD_IP_BLOCK_TYPE_COMMON,<br>
AMD_IP_BLOCK_TYPE_GMC,<br>
AMD_IP_BLOCK_TYPE_IH,<br>
AMD_IP_BLOCK_TYPE_SMC,<br>
AMD_IP_BLOCK_TYPE_PSP,<br>
AMD_IP_BLOCK_TYPE_DCE,<br>
AMD_IP_BLOCK_TYPE_GFX,<br>
AMD_IP_BLOCK_TYPE_SDMA,<br>
AMD_IP_BLOCK_TYPE_UVD,<br>
AMD_IP_BLOCK_TYPE_VCE,<br>
AMD_IP_BLOCK_TYPE_ACP,<br>
AMD_IP_BLOCK_TYPE_VCN<br>
};<br>
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Thanks,
<p></p>
<p style="margin-top:0;margin-bottom:0">Sonny<br>
</p>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Deucher, Alexander<br>
<b>Sent:</b> Wednesday, July 4, 2018 2:49:17 AM<br>
<b>To:</b> Qu, Jim; Zhang, Jerry; Jiang, Sonny; amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c</font>
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<p style="margin-top:0; margin-bottom:0">yeah, that's a good idea.<br>
</p>
<br>
Alex<br>
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<div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Qu, Jim <Jim.Qu@amd.com><br>
<b>Sent:</b> Wednesday, July 4, 2018 1:14 AM<br>
<b>To:</b> Zhang, Jerry; Jiang, Sonny; amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> 答复: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c</font>
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<div class="x_PlainText">I always confuse any bits definiation about some feature mask. such as ip_block_mask, pg_mask, cg_mask, pp_feature_mask. I think other people who is not familiar with amdgpu driver may have the same problem.<br>
<br>
So, is it possible to detail every bit mask of features?<br>
<br>
Thanks<br>
JimQu<br>
<br>
________________________________________<br>
发件人: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> 代表 Zhang, Jerry (Junwei) <Jerry.Zhang@amd.com><br>
发送时间: 2018年7月4日 12:57:01<br>
收件人: Jiang, Sonny; amd-gfx@lists.freedesktop.org<br>
主题: Re: [PATCH v2] drm/amdgpu: update documentation for amdgpu_drv.c<br>
<br>
On 07/04/2018 04:06 AM, Sonny Jiang wrote:<br>
> Signed-off-by: Sonny Jiang <sonny.jiang@amd.com><br>
Acked-by: Junwei Zhang <Jerry.Zhang@amd.com><br>
<br>
> ---<br>
> Documentation/gpu/amdgpu.rst | 7 +<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 222 +++++++++++++++++++++++++++++++-<br>
> 2 files changed, 222 insertions(+), 7 deletions(-)<br>
><br>
> diff --git a/Documentation/gpu/amdgpu.rst b/Documentation/gpu/amdgpu.rst<br>
> index 765c2a3..a740e49 100644<br>
> --- a/Documentation/gpu/amdgpu.rst<br>
> +++ b/Documentation/gpu/amdgpu.rst<br>
> @@ -5,6 +5,13 @@<br>
> The drm/amdgpu driver supports all AMD Radeon GPUs based on the Graphics Core<br>
> Next (GCN) architecture.<br>
><br>
> +Module Parameters<br>
> +=================<br>
> +<br>
> +The amdgpu driver supports the following module parameters:<br>
> +<br>
> +.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> +<br>
> Core Driver Infrastructure<br>
> ==========================<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> index 963578c..caf81ce 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c<br>
> @@ -1,10 +1,3 @@<br>
> -/**<br>
> - * \file amdgpu_drv.c<br>
> - * AMD Amdgpu driver<br>
> - *<br>
> - * \author Gareth Hughes <gareth@valinux.com><br>
> - */<br>
> -<br>
> /*<br>
> * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.<br>
> * All Rights Reserved.<br>
> @@ -136,102 +129,235 @@ int amdgpu_gpu_recovery = -1; /* auto */<br>
> int amdgpu_emu_mode = 0;<br>
> uint amdgpu_smu_memory_pool_size = 0;<br>
><br>
> +/**<br>
> + * DOC: vramlimit (int)<br>
> + * Restrict the total amount of VRAM in MiB for testing. The default is 0 (Use full VRAM).<br>
> + */<br>
> MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");<br>
> module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);<br>
><br>
> +/**<br>
> + * DOC: vis_vramlimit (int)<br>
> + * Restrict the amount of CPU visible VRAM in MiB for testing. The default is 0 (Use full CPU visible VRAM).<br>
> + */<br>
> MODULE_PARM_DESC(vis_vramlimit, "Restrict visible VRAM for testing, in megabytes");<br>
> module_param_named(vis_vramlimit, amdgpu_vis_vram_limit, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: gartsize (uint)<br>
> + * Restrict the size of GART in Mib (32, 64, etc.) for testing. The default is -1 (The size depends on asic).<br>
> + */<br>
> MODULE_PARM_DESC(gartsize, "Size of GART to setup in megabytes (32, 64, etc., -1=auto)");<br>
> module_param_named(gartsize, amdgpu_gart_size, uint, 0600);<br>
><br>
> +/**<br>
> + * DOC: gttsize (int)<br>
> + * Restrict the size of GTT domain in MiB for testing. The default is -1 (It's VRAM size if 3GB < VRAM < 3/4 RAM,<br>
> + * otherwise 3/4 RAM size).<br>
> + */<br>
> MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");<br>
> module_param_named(gttsize, amdgpu_gtt_size, int, 0600);<br>
><br>
> +/**<br>
> + * DOC: moverate (int)<br>
> + * Set maximum buffer migration rate in MB/s. The default is -1 (8 MB/s).<br>
> + */<br>
> MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");<br>
> module_param_named(moverate, amdgpu_moverate, int, 0600);<br>
><br>
> +/**<br>
> + * DOC: benchmark (int)<br>
> + * Run benchmarks. The default is 0 (Skip benchmarks).<br>
> + */<br>
> MODULE_PARM_DESC(benchmark, "Run benchmark");<br>
> module_param_named(benchmark, amdgpu_benchmarking, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: test (int)<br>
> + * Test BO GTT->VRAM and VRAM->GTT GPU copies. The default is 0 (Skip test, only set 1 to run test).<br>
> + */<br>
> MODULE_PARM_DESC(test, "Run tests");<br>
> module_param_named(test, amdgpu_testing, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: audio (int)<br>
> + * Set Audio. The default is -1 (Enabled), set 0 to disabled it.<br>
> + */<br>
> MODULE_PARM_DESC(audio, "Audio enable (-1 = auto, 0 = disable, 1 = enable)");<br>
> module_param_named(audio, amdgpu_audio, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: disp_priority (int)<br>
> + * Set display Priority (0 = auto, 1 = normal, 2 = high). The default is 0.<br>
> + */<br>
> MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");<br>
> module_param_named(disp_priority, amdgpu_disp_priority, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: hw_i2c (int)<br>
> + * To enable hw i2c engine. The default is 0 (Disabled).<br>
> + */<br>
> MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");<br>
> module_param_named(hw_i2c, amdgpu_hw_i2c, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: pcie_gen2 (int)<br>
> + * To disable PCIE Gen2 mode (0 = disable, 1 = enable). The default is -1 (auto, enabled).<br>
> + */<br>
> MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");<br>
> module_param_named(pcie_gen2, amdgpu_pcie_gen2, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: msi (int)<br>
> + * To disable MSI functionality (1 = enable, 0 = disable). The default is -1 (auto, enabled).<br>
> + */<br>
> MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(msi, amdgpu_msi, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: lockup_timeout (int)<br>
> + * Set GPU scheduler timeout value in ms. It must be > 0. The default is 10000.<br>
> + */<br>
> MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms > 0 (default 10000)");<br>
> module_param_named(lockup_timeout, amdgpu_lockup_timeout, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: dpm (int)<br>
> + * Override for dynamic power management setting (1 = enable, 0 = disable). The default is -1 (auto).<br>
> + */<br>
> MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(dpm, amdgpu_dpm, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: fw_load_type (int)<br>
> + * Set different firmware loading type for debugging (0 = direct, 1 = SMU, 2 = PSP). The default is -1 (auto).<br>
> + */<br>
> MODULE_PARM_DESC(fw_load_type, "firmware loading type (0 = direct, 1 = SMU, 2 = PSP, -1 = auto)");<br>
> module_param_named(fw_load_type, amdgpu_fw_load_type, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: aspm (int)<br>
> + * To disable ASPM (1 = enable, 0 = disable). The default is -1 (auto, enabled).<br>
> + */<br>
> MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(aspm, amdgpu_aspm, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: runpm (int)<br>
> + * Override for runtime power management control for dGPUs in PX/HG laptops. The amdgpu driver can dynamically power down<br>
> + * the dGPU on PX/HG laptops when it is idle. The default is -1 (auto enable). Setting the value to 0 disables this functionality.<br>
> + */<br>
> MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");<br>
> module_param_named(runpm, amdgpu_runtime_pm, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: ip_block_mask (uint)<br>
> + * Override what IP blocks are enabled on the GPU. Each GPU is a collection of IP blocks (gfx, display, video, etc.).<br>
> + * Use this parameter to disable specific blocks. Note that the IP blocks do not have a fixed index (e.g., you might have a device<br>
> + * with multiple instances of an IP block) so the mask is board specific. The default is 0xffffffff (enable all blocks on a device).<br>
> + */<br>
> MODULE_PARM_DESC(ip_block_mask, "IP Block Mask (all blocks enabled (default))");<br>
> module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);<br>
><br>
> +/**<br>
> + * DOC: bapm (int)<br>
> + * To disable BAPM (0 = disable). The default -1 (auto, enabled)<br>
> + */<br>
> MODULE_PARM_DESC(bapm, "BAPM support (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(bapm, amdgpu_bapm, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: deep_color (int)<br>
> + * Set 1 to enable Deep Color support. The default is 0 (disabled).<br>
> + */<br>
> MODULE_PARM_DESC(deep_color, "Deep Color support (1 = enable, 0 = disable (default))");<br>
> module_param_named(deep_color, amdgpu_deep_color, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: vm_size (int)<br>
> + * Override the size of the GPU's per client virtual address space in GiB. The default is -1 (automatic for each asic).<br>
> + */<br>
> MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 64GB)");<br>
> module_param_named(vm_size, amdgpu_vm_size, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: vm_fragment_size (int)<br>
> + * Override VM fragment size in bits (4, 5, etc. 4 = 64K, 9 = 2M). The default is -1 (automatic for each asic).<br>
> + */<br>
> MODULE_PARM_DESC(vm_fragment_size, "VM fragment size in bits (4, 5, etc. 4 = 64K (default), Max 9 = 2M)");<br>
> module_param_named(vm_fragment_size, amdgpu_vm_fragment_size, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: vm_block_size (int)<br>
> + * Override VM page table size in bits (default depending on vm_size and hw setup). The default is -1 (automatic for each asic).<br>
> + */<br>
> MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default depending on vm_size)");<br>
> module_param_named(vm_block_size, amdgpu_vm_block_size, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: vm_fault_stop (int)<br>
> + * Stop on VM fault for debugging (0 = never, 1 = print first, 2 = always). The default is 0 (No stop).<br>
> + */<br>
> MODULE_PARM_DESC(vm_fault_stop, "Stop on VM fault (0 = never (default), 1 = print first, 2 = always)");<br>
> module_param_named(vm_fault_stop, amdgpu_vm_fault_stop, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: vm_debug (int)<br>
> + * Debug VM handling (0 = disabled, 1 = enabled). The default is 0 (Disabled).<br>
> + */<br>
> MODULE_PARM_DESC(vm_debug, "Debug VM handling (0 = disabled (default), 1 = enabled)");<br>
> module_param_named(vm_debug, amdgpu_vm_debug, int, 0644);<br>
><br>
> +/**<br>
> + * DOC: vm_update_mode (int)<br>
> + * Override VM update mode. VM updated by using CPU (0 = never, 1 = Graphics only, 2 = Compute only, 3 = Both). The default<br>
> + * is -1 (Only in large BAR(LB) systems Compute VM tables will be updated by CPU, otherwise 0, never).<br>
> + */<br>
> MODULE_PARM_DESC(vm_update_mode, "VM update using CPU (0 = never (default except for large BAR(LB)), 1 = Graphics only, 2 = Compute only (default for LB), 3 = Both");<br>
> module_param_named(vm_update_mode, amdgpu_vm_update_mode, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: vram_page_split (int)<br>
> + * Override the number of pages after we split VRAM allocations (default 512, -1 = disable). The default is 512.<br>
> + */<br>
> MODULE_PARM_DESC(vram_page_split, "Number of pages after we split VRAM allocations (default 512, -1 = disable)");<br>
> module_param_named(vram_page_split, amdgpu_vram_page_split, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: exp_hw_support (int)<br>
> + * Enable experimental hw support (1 = enable). The default is 0 (disabled).<br>
> + */<br>
> MODULE_PARM_DESC(exp_hw_support, "experimental hw support (1 = enable, 0 = disable (default))");<br>
> module_param_named(exp_hw_support, amdgpu_exp_hw_support, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: dc (int)<br>
> + * Disable/Enable Display Core driver for debugging (1 = enable, 0 = disable). The default is -1 (automatic for each asic).<br>
> + */<br>
> MODULE_PARM_DESC(dc, "Display Core driver (1 = enable, 0 = disable, -1 = auto (default))");<br>
> module_param_named(dc, amdgpu_dc, int, 0444);<br>
><br>
> MODULE_PARM_DESC(dc_log, "Display Core Log Level (0 = minimal (default), 1 = chatty");<br>
> module_param_named(dc_log, amdgpu_dc_log, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: sched_jobs (int)<br>
> + * Override the max number of jobs supported in the sw queue. The default is 32.<br>
> + */<br>
> MODULE_PARM_DESC(sched_jobs, "the max number of jobs supported in the sw queue (default 32)");<br>
> module_param_named(sched_jobs, amdgpu_sched_jobs, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: sched_hw_submission (int)<br>
> + * Override the max number of HW submissions. The default is 2.<br>
> + */<br>
> MODULE_PARM_DESC(sched_hw_submission, "the max number of HW submissions (default 2)");<br>
> module_param_named(sched_hw_submission, amdgpu_sched_hw_submission, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: ppfeaturemask (uint)<br>
> + * Override what power features are enabled. The default is 0xffff3fff (gfxoff(bit 15), overdriver(bit 14) disabled).<br>
> + */<br>
> MODULE_PARM_DESC(ppfeaturemask, "all power features enabled (default))");<br>
> module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, uint, 0444);<br>
><br>
> @@ -241,58 +367,129 @@ module_param_named(no_evict, amdgpu_no_evict, int, 0444);<br>
> MODULE_PARM_DESC(direct_gma_size, "Direct GMA size in megabytes (max 96MB)");<br>
> module_param_named(direct_gma_size, amdgpu_direct_gma_size, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: pcie_gen_cap (uint)<br>
> + * Override PCIE gen speed capabilities. The default is 0 (automatic for each asic).<br>
> + */<br>
> MODULE_PARM_DESC(pcie_gen_cap, "PCIE Gen Caps (0: autodetect (default))");<br>
> module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444);<br>
><br>
> +/**<br>
> + * DOC: pcie_lane_cap (uint)<br>
> + * Override PCIE lanes capabilities. The default is 0 (automatic for each asic).<br>
> + */<br>
> MODULE_PARM_DESC(pcie_lane_cap, "PCIE Lane Caps (0: autodetect (default))");<br>
> module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);<br>
><br>
> +/**<br>
> + * DOC: cg_mask (uint)<br>
> + * Override what Clockgating features are enabled on GPU (0 = disable clock gating). The default is 0xffffffff (all enabled).<br>
> + */<br>
> MODULE_PARM_DESC(cg_mask, "Clockgating flags mask (0 = disable clock gating)");<br>
> module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);<br>
><br>
> +/**<br>
> + * DOC: pg_mask (uint)<br>
> + * Override what Powergating features are enabled on GPU (0 = disable power gating). The default is 0xffffffff (all enabled).<br>
> + */<br>
> MODULE_PARM_DESC(pg_mask, "Powergating flags mask (0 = disable power gating)");<br>
> module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);<br>
><br>
> +/**<br>
> + * DOC: sdma_phase_quantum (uint)<br>
> + * Override SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change). The default is 32.<br>
> + */<br>
> MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GPU clock cycles, 0 = no change (default 32))");<br>
> module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint, 0444);<br>
><br>
> +/**<br>
> + * DOC: disable_cu (charp)<br>
> + * Set to disable CUs (It's set like se.sh.cu,...). The default is NULL.<br>
> + */<br>
> MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");<br>
> module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);<br>
><br>
> +/**<br>
> + * DOC: virtual_display (charp)<br>
> + * Set to enable virtual display feature. This feature provides a virtual display hardware on headless boards<br>
> + * or in virtualized environments. It will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x. The default is NULL.<br>
> + */<br>
> MODULE_PARM_DESC(virtual_display,<br>
> "Enable virtual display feature (the virtual_display will be set like xxxx:xx:xx.x,x;xxxx:xx:xx.x,x)");<br>
> module_param_named(virtual_display, amdgpu_virtual_display, charp, 0444);<br>
><br>
> +/**<br>
> + * DOC: ngg (int)<br>
> + * Set to enable Next Generation Graphics (1 = enable). The default is 0 (disabled).<br>
> + */<br>
> MODULE_PARM_DESC(ngg, "Next Generation Graphics (1 = enable, 0 = disable(default depending on gfx))");<br>
> module_param_named(ngg, amdgpu_ngg, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: prim_buf_per_se (int)<br>
> + * Override the size of Primitive Buffer per Shader Engine in Byte. The default is 0 (depending on gfx).<br>
> + */<br>
> MODULE_PARM_DESC(prim_buf_per_se, "the size of Primitive Buffer per Shader Engine (default depending on gfx)");<br>
> module_param_named(prim_buf_per_se, amdgpu_prim_buf_per_se, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: pos_buf_per_se (int)<br>
> + * Override the size of Position Buffer per Shader Engine in Byte. The default is 0 (depending on gfx).<br>
> + */<br>
> MODULE_PARM_DESC(pos_buf_per_se, "the size of Position Buffer per Shader Engine (default depending on gfx)");<br>
> module_param_named(pos_buf_per_se, amdgpu_pos_buf_per_se, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: cntl_sb_buf_per_se (int)<br>
> + * Override the size of Control Sideband per Shader Engine in Byte. The default is 0 (depending on gfx).<br>
> + */<br>
> MODULE_PARM_DESC(cntl_sb_buf_per_se, "the size of Control Sideband per Shader Engine (default depending on gfx)");<br>
> module_param_named(cntl_sb_buf_per_se, amdgpu_cntl_sb_buf_per_se, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: param_buf_per_se (int)<br>
> + * Override the size of Off-Chip Pramater Cache per Shader Engine in Byte. The default is 0 (depending on gfx).<br>
> + */<br>
> MODULE_PARM_DESC(param_buf_per_se, "the size of Off-Chip Pramater Cache per Shader Engine (default depending on gfx)");<br>
> module_param_named(param_buf_per_se, amdgpu_param_buf_per_se, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: job_hang_limit (int)<br>
> + * Set how much time allow a job hang and not drop it. The default is 0.<br>
> + */<br>
> MODULE_PARM_DESC(job_hang_limit, "how much time allow a job hang and not drop it (default 0)");<br>
> module_param_named(job_hang_limit, amdgpu_job_hang_limit, int ,0444);<br>
><br>
> +/**<br>
> + * DOC: lbpw (int)<br>
> + * Override Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable). The default is -1 (auto, enabled).<br>
> + */<br>
> MODULE_PARM_DESC(lbpw, "Load Balancing Per Watt (LBPW) support (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(lbpw, amdgpu_lbpw, int, 0444);<br>
><br>
> MODULE_PARM_DESC(compute_multipipe, "Force compute queues to be spread across pipes (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(compute_multipipe, amdgpu_compute_multipipe, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: gpu_recovery (int)<br>
> + * Set to enable GPU recovery mechanism (1 = enable, 0 = disable). The default is -1 (auto, disabled except SRIOV).<br>
> + */<br>
> MODULE_PARM_DESC(gpu_recovery, "Enable GPU recovery mechanism, (1 = enable, 0 = disable, -1 = auto)");<br>
> module_param_named(gpu_recovery, amdgpu_gpu_recovery, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: emu_mode (int)<br>
> + * Set value 1 to enable emulation mode. The default is 0 (disabled).<br>
> + */<br>
> MODULE_PARM_DESC(emu_mode, "Emulation mode, (1 = enable, 0 = disable)");<br>
> module_param_named(emu_mode, amdgpu_emu_mode, int, 0444);<br>
><br>
> +/**<br>
> + * DOC: si_support (int)<br>
> + * Set SI support driver. This parameter works after set config CONFIG_DRM_AMDGPU_SI. For SI asic, when radeon driver is enabled,<br>
> + * set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available,<br>
> + * otherwise using amdgpu driver.<br>
> + */<br>
> #ifdef CONFIG_DRM_AMDGPU_SI<br>
><br>
> #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)<br>
> @@ -306,6 +503,12 @@ MODULE_PARM_DESC(si_support, "SI support (1 = enabled (default), 0 = disabled)")<br>
> module_param_named(si_support, amdgpu_si_support, int, 0444);<br>
> #endif<br>
><br>
> +/**<br>
> + * DOC: cik_support (int)<br>
> + * Set CIK support driver. This parameter works after set config CONFIG_DRM_AMDGPU_CIK. For CIK asic, when radeon driver is enabled,<br>
> + * set value 0 to use radeon driver, while set value 1 to use amdgpu driver. The default is using radeon driver when it available,<br>
> + * otherwise using amdgpu driver.<br>
> + */<br>
> #ifdef CONFIG_DRM_AMDGPU_CIK<br>
><br>
> #if defined(CONFIG_DRM_RADEON) || defined(CONFIG_DRM_RADEON_MODULE)<br>
> @@ -319,6 +522,11 @@ MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)<br>
> module_param_named(cik_support, amdgpu_cik_support, int, 0444);<br>
> #endif<br>
><br>
> +/**<br>
> + * DOC: smu_memory_pool_size (uint)<br>
> + * It is used to reserve gtt for smu debug usage, setting value 0 to disable it. The actual size is value * 256MiB.<br>
> + * E.g. 0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte. The default is 0 (disabled).<br>
> + */<br>
> MODULE_PARM_DESC(smu_memory_pool_size,<br>
> "reserve gtt for smu debug usage, 0 = disable,"<br>
> "0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte");<br>
><br>
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