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<p style="margin-top:0;margin-bottom:0">Sounds good to me.</p>
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<p style="margin-top:0;margin-bottom:0">Alex<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Zhu, Rex <Rex.Zhu@amd.com><br>
<b>Sent:</b> Tuesday, October 9, 2018 9:44 PM<br>
<b>To:</b> Alex Deucher<br>
<b>Cc:</b> amd-gfx list<br>
<b>Subject:</b> RE: [PATCH 3/5] drm/amdgpu: Extract the function of fw loading out of powerplay</font>
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<br>
> -----Original Message-----<br>
> From: Alex Deucher <alexdeucher@gmail.com><br>
> Sent: Wednesday, October 10, 2018 3:28 AM<br>
> To: Zhu, Rex <Rex.Zhu@amd.com><br>
> Cc: amd-gfx list <amd-gfx@lists.freedesktop.org><br>
> Subject: Re: [PATCH 3/5] drm/amdgpu: Extract the function of fw loading out<br>
> of powerplay<br>
> <br>
> On Tue, Oct 9, 2018 at 8:45 AM Rex Zhu <Rex.Zhu@amd.com> wrote:<br>
> ><br>
> > So there is no dependence between gfx/sdma/smu.<br>
> > and for Vi, after IH hw_init, driver load all the smu/gfx/sdma fw. for<br>
> > AI, fw loading is controlled by PSP, after psp hw init, we call the<br>
> > function to check smu fw version.<br>
> ><br>
> > Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
> > ---<br>
> > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 30<br>
> ++++++++++++++++++++++<br>
> > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 11 --------<br>
> > drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8 ------<br>
> > drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c | 20 ---------------<br>
> > drivers/gpu/drm/amd/powerplay/inc/hwmgr.h | 1 -<br>
> > drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 8 ++----<br>
> > drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c | 5 ----<br>
> > 7 files changed, 32 insertions(+), 51 deletions(-)<br>
> ><br>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> > b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> > index 4787571..a6766b3 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
> > @@ -1525,6 +1525,24 @@ static int amdgpu_device_ip_early_init(struct<br>
> amdgpu_device *adev)<br>
> > return 0;<br>
> > }<br>
> ><br>
> > +static int amdgpu_device_fw_loading(struct amdgpu_device *adev,<br>
> > +uint32_t index) {<br>
> > + int r = 0;<br>
> > +<br>
> > + if ((adev->asic_type < CHIP_VEGA10<br>
> > + && (adev->ip_blocks[index].version->type ==<br>
> AMD_IP_BLOCK_TYPE_IH))<br>
> > + || (adev->asic_type >= CHIP_VEGA10<br>
> > + && (adev->ip_blocks[index].version->type ==<br>
> > + AMD_IP_BLOCK_TYPE_PSP))) {<br>
> <br>
> This seems kind of fragile. If we change the order again at some point, it will<br>
> break. How about we check whether hw_init/resume is done or not on the<br>
> blocks we care about or move the checks into the callers and only call when<br>
> we need it?<br>
<br>
Hi Alex,<br>
<br>
How about split hw_init to hw_init_phase1 and hw_init_phase2 as resume?<br>
We loaded fw(call psp_hw_init and start_smu) between phase1 and phase2.<br>
<br>
<br>
Regards<br>
Rex<br>
<br>
> > + if (adev->powerplay.pp_funcs->load_firmware) {<br>
> > + r = adev->powerplay.pp_funcs->load_firmware(adev-<br>
> >powerplay.pp_handle);<br>
> > + if (r) {<br>
> > + pr_err("firmware loading failed\n");<br>
> > + return r;<br>
> > + }<br>
> > + }<br>
> > + }<br>
> > + return 0;<br>
> > +}<br>
> > /**<br>
> > * amdgpu_device_ip_init - run init for hardware IPs<br>
> > *<br>
> > @@ -1595,6 +1613,9 @@ static int amdgpu_device_ip_init(struct<br>
> amdgpu_device *adev)<br>
> > return r;<br>
> > }<br>
> > adev->ip_blocks[i].status.hw = true;<br>
> > + r = amdgpu_device_fw_loading(adev, i);<br>
> > + if (r)<br>
> > + return r;<br>
> > }<br>
> ><br>
> > amdgpu_xgmi_add_device(adev);<br>
> > @@ -2030,6 +2051,9 @@ static int<br>
> amdgpu_device_ip_reinit_early_sriov(struct amdgpu_device *adev)<br>
> > DRM_INFO("RE-INIT: %s %s\n", block->version->funcs->name,<br>
> r?"failed":"succeeded");<br>
> > if (r)<br>
> > return r;<br>
> > + r = amdgpu_device_fw_loading(adev, i);<br>
> > + if (r)<br>
> > + return r;<br>
> > }<br>
> > }<br>
> ><br>
> > @@ -2098,6 +2122,9 @@ static int<br>
> amdgpu_device_ip_resume_phase1(struct amdgpu_device *adev)<br>
> > adev->ip_blocks[i].version->funcs->name, r);<br>
> > return r;<br>
> > }<br>
> > + r = amdgpu_device_fw_loading(adev, i);<br>
> > + if (r)<br>
> > + return r;<br>
> > }<br>
> > }<br>
> ><br>
> > @@ -2134,6 +2161,9 @@ static int<br>
> amdgpu_device_ip_resume_phase2(struct amdgpu_device *adev)<br>
> > adev->ip_blocks[i].version->funcs->name, r);<br>
> > return r;<br>
> > }<br>
> > + r = amdgpu_device_fw_loading(adev, i);<br>
> > + if (r)<br>
> > + return r;<br>
> > }<br>
> ><br>
> > return 0;<br>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c<br>
> > b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c<br>
> > index 8439f9a..3d0f277 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c<br>
> > @@ -4175,20 +4175,9 @@ static void gfx_v8_0_rlc_start(struct<br>
> > amdgpu_device *adev)<br>
> ><br>
> > static int gfx_v8_0_rlc_resume(struct amdgpu_device *adev) {<br>
> > - int r;<br>
> > -<br>
> > gfx_v8_0_rlc_stop(adev);<br>
> > gfx_v8_0_rlc_reset(adev);<br>
> > gfx_v8_0_init_pg(adev);<br>
> > -<br>
> > - if (adev->powerplay.pp_funcs->load_firmware) {<br>
> > - r = adev->powerplay.pp_funcs->load_firmware(adev-<br>
> >powerplay.pp_handle);<br>
> > - if (r) {<br>
> > - pr_err("firmware loading failed\n");<br>
> > - return r;<br>
> > - }<br>
> > - }<br>
> > -<br>
> > gfx_v8_0_rlc_start(adev);<br>
> ><br>
> > return 0;<br>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> > b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> > index 0bdde7f..6fb3eda 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> > @@ -788,14 +788,6 @@ static int sdma_v3_0_start(struct amdgpu_device<br>
> > *adev) {<br>
> > int r;<br>
> ><br>
> > - if (adev->powerplay.pp_funcs->load_firmware) {<br>
> > - r = adev->powerplay.pp_funcs->load_firmware(adev-<br>
> >powerplay.pp_handle);<br>
> > - if (r) {<br>
> > - pr_err("firmware loading failed\n");<br>
> > - return r;<br>
> > - }<br>
> > - }<br>
> > -<br>
> > /* disable sdma engine before programing it */<br>
> > sdma_v3_0_ctx_switch_enable(adev, false);<br>
> > sdma_v3_0_enable(adev, false); diff --git<br>
> > a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
> > b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
> > index d552af2..47ac923 100644<br>
> > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
> > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c<br>
> > @@ -89,7 +89,6 @@ int hwmgr_early_init(struct pp_hwmgr *hwmgr)<br>
> > hwmgr_init_default_caps(hwmgr);<br>
> > hwmgr_set_user_specify_caps(hwmgr);<br>
> > hwmgr->fan_ctrl_is_in_default_mode = true;<br>
> > - hwmgr->reload_fw = 1;<br>
> > hwmgr_init_workload_prority(hwmgr);<br>
> ><br>
> > switch (hwmgr->chip_family) {<br>
> > @@ -209,17 +208,6 @@ int hwmgr_hw_init(struct pp_hwmgr *hwmgr) {<br>
> > int ret = 0;<br>
> ><br>
> > - if (!hwmgr || !hwmgr->smumgr_funcs)<br>
> > - return -EINVAL;<br>
> > -<br>
> > - if (hwmgr->smumgr_funcs->start_smu) {<br>
> > - ret = hwmgr->smumgr_funcs->start_smu(hwmgr);<br>
> > - if (ret) {<br>
> > - pr_err("smc start failed\n");<br>
> > - return -EINVAL;<br>
> > - }<br>
> > - }<br>
> > -<br>
> > if (!hwmgr->pm_en)<br>
> > return 0;<br>
> ><br>
> > @@ -301,7 +289,6 @@ int hwmgr_suspend(struct pp_hwmgr *hwmgr)<br>
> > if (!hwmgr || !hwmgr->pm_en)<br>
> > return 0;<br>
> ><br>
> > - hwmgr->reload_fw = true;<br>
> > phm_disable_smc_firmware_ctf(hwmgr);<br>
> > ret = psm_set_boot_states(hwmgr);<br>
> > if (ret)<br>
> > @@ -321,13 +308,6 @@ int hwmgr_resume(struct pp_hwmgr *hwmgr)<br>
> > if (!hwmgr)<br>
> > return -EINVAL;<br>
> ><br>
> > - if (hwmgr->smumgr_funcs && hwmgr->smumgr_funcs->start_smu) {<br>
> > - if (hwmgr->smumgr_funcs->start_smu(hwmgr)) {<br>
> > - pr_err("smc start failed\n");<br>
> > - return -EINVAL;<br>
> > - }<br>
> > - }<br>
> > -<br>
> > if (!hwmgr->pm_en)<br>
> > return 0;<br>
> ><br>
> > diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
> > b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
> > index 35f2272..e5a60aa 100644<br>
> > --- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
> > +++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h<br>
> > @@ -734,7 +734,6 @@ struct pp_hwmgr {<br>
> > void *smu_backend;<br>
> > const struct pp_smumgr_func *smumgr_funcs;<br>
> > bool is_kicker;<br>
> > - bool reload_fw;<br>
> ><br>
> > enum PP_DAL_POWERLEVEL dal_power_level;<br>
> > struct phm_dynamic_state_info dyn_state; diff --git<br>
> > a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c<br>
> > b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c<br>
> > index 99b4e4f..3f51d54 100644<br>
> > --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c<br>
> > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c<br>
> > @@ -343,9 +343,6 @@ int smu7_request_smu_load_fw(struct pp_hwmgr<br>
> *hwmgr)<br>
> > uint32_t fw_to_load;<br>
> > int r = 0;<br>
> ><br>
> > - if (!hwmgr->reload_fw)<br>
> > - return 0;<br>
> > -<br>
> > amdgpu_ucode_init_bo(hwmgr->adev);<br>
> ><br>
> > if (smu_data->soft_regs_start) @@ -432,10 +429,9 @@ int<br>
> > smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)<br>
> > smu7_send_msg_to_smc_with_parameter(hwmgr,<br>
> > PPSMC_MSG_LoadUcodes, fw_to_load);<br>
> ><br>
> > r = smu7_check_fw_load_finish(hwmgr, fw_to_load);<br>
> > - if (!r) {<br>
> > - hwmgr->reload_fw = 0;<br>
> > + if (!r)<br>
> > return 0;<br>
> > - }<br>
> > +<br>
> > pr_err("SMU load firmware failed\n");<br>
> ><br>
> > failed:<br>
> > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
> > b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
> > index abbf2f2..f836d30 100644<br>
> > --- a/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
> > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/smu8_smumgr.c<br>
> > @@ -661,9 +661,6 @@ static int smu8_request_smu_load_fw(struct<br>
> pp_hwmgr *hwmgr)<br>
> > uint32_t fw_to_check = 0;<br>
> > int ret;<br>
> ><br>
> > - if (!hwmgr->reload_fw)<br>
> > - return 0;<br>
> > -<br>
> > amdgpu_ucode_init_bo(hwmgr->adev);<br>
> ><br>
> > smu8_smu_populate_firmware_entries(hwmgr);<br>
> > @@ -719,8 +716,6 @@ static int smu8_request_smu_load_fw(struct<br>
> pp_hwmgr *hwmgr)<br>
> > return ret;<br>
> > }<br>
> ><br>
> > - hwmgr->reload_fw = 0;<br>
> > -<br>
> > return 0;<br>
> > }<br>
> ><br>
> > --<br>
> > 1.9.1<br>
> ><br>
> > _______________________________________________<br>
> > amd-gfx mailing list<br>
> > amd-gfx@lists.freedesktop.org<br>
> > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" id="LPlnk554620" class="OWAAutoLink" previewremoved="true">
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