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<p style="margin-top:0;margin-bottom:0">Thanks Jerry.</p>
<p style="margin-top:0;margin-bottom:0">Good suggestion.</p>
<p style="margin-top:0;margin-bottom:0">Use the right mask for PD instand of hardcode.</p>
<p style="margin-top:0;margin-bottom:0">so don't need to revert the whole patch.</p>
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<p style="margin-top:0;margin-bottom:0">Best Regards</p>
<p style="margin-top:0;margin-bottom:0">Rex<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" color="#000000" face="Calibri, sans-serif"><b>From:</b> Zhang, Jerry<br>
<b>Sent:</b> Tuesday, October 23, 2018 10:02 AM<br>
<b>To:</b> Zhu, Rex; amd-gfx@lists.freedesktop.org; Koenig, Christian<br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: Fix amdgpu_vm_alloc_pts failed</font>
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<div class="PlainText">On 10/23/2018 12:09 AM, Rex Zhu wrote:<br>
> When the va address located in the last pd entry,<br>
<br>
Do you mean the root PD?<br>
maybe we need roundup root PD in amdgpu_vm_entries_mask() like <br>
amdgpu_vm_num_entries().<br>
<br>
BTW, looks amdgpu_vm_entries_mask() is going to replace the <br>
amdgpu_vm_num_entries()<br>
<br>
Jerry<br>
> the alloc_pts will failed.<br>
> caused by<br>
> "drm/amdgpu: add amdgpu_vm_entries_mask v2"<br>
> commit 72af632549b97ead9251bb155f08fefd1fb6f5c3.<br>
><br>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
> ---<br>
>   drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 34 +++++++---------------------------<br>
>   1 file changed, 7 insertions(+), 27 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br>
> index 054633b..1a3af72 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c<br>
> @@ -191,26 +191,6 @@ static unsigned amdgpu_vm_num_entries(struct amdgpu_device *adev,<br>
>   }<br>
>   <br>
>   /**<br>
> - * amdgpu_vm_entries_mask - the mask to get the entry number of a PD/PT<br>
> - *<br>
> - * @adev: amdgpu_device pointer<br>
> - * @level: VMPT level<br>
> - *<br>
> - * Returns:<br>
> - * The mask to extract the entry number of a PD/PT from an address.<br>
> - */<br>
> -static uint32_t amdgpu_vm_entries_mask(struct amdgpu_device *adev,<br>
> -                                    unsigned int level)<br>
> -{<br>
> -     if (level <= adev->vm_manager.root_level)<br>
> -             return 0xffffffff;<br>
> -     else if (level != AMDGPU_VM_PTB)<br>
> -             return 0x1ff;<br>
> -     else<br>
> -             return AMDGPU_VM_PTE_COUNT(adev) - 1;<br>
> -}<br>
> -<br>
> -/**<br>
>    * amdgpu_vm_bo_size - returns the size of the BOs in bytes<br>
>    *<br>
>    * @adev: amdgpu_device pointer<br>
> @@ -419,17 +399,17 @@ static void amdgpu_vm_pt_start(struct amdgpu_device *adev,<br>
>   static bool amdgpu_vm_pt_descendant(struct amdgpu_device *adev,<br>
>                                    struct amdgpu_vm_pt_cursor *cursor)<br>
>   {<br>
> -     unsigned mask, shift, idx;<br>
> +     unsigned num_entries, shift, idx;<br>
>   <br>
>        if (!cursor->entry->entries)<br>
>                return false;<br>
>   <br>
>        BUG_ON(!cursor->entry->base.bo);<br>
> -     mask = amdgpu_vm_entries_mask(adev, cursor->level);<br>
> +     num_entries = amdgpu_vm_num_entries(adev, cursor->level);<br>
>        shift = amdgpu_vm_level_shift(adev, cursor->level);<br>
>   <br>
>        ++cursor->level;<br>
> -     idx = (cursor->pfn >> shift) & mask;<br>
> +     idx = (cursor->pfn >> shift) % num_entries;<br>
>        cursor->parent = cursor->entry;<br>
>        cursor->entry = &cursor->entry->entries[idx];<br>
>        return true;<br>
> @@ -1618,7 +1598,7 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,<br>
>        amdgpu_vm_pt_start(adev, params->vm, start, &cursor);<br>
>        while (cursor.pfn < end) {<br>
>                struct amdgpu_bo *pt = cursor.entry->base.bo;<br>
> -             unsigned shift, parent_shift, mask;<br>
> +             unsigned shift, parent_shift, num_entries;<br>
>                uint64_t incr, entry_end, pe_start;<br>
>   <br>
>                if (!pt)<br>
> @@ -1673,9 +1653,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params,<br>
>   <br>
>                /* Looks good so far, calculate parameters for the update */<br>
>                incr = AMDGPU_GPU_PAGE_SIZE << shift;<br>
> -             mask = amdgpu_vm_entries_mask(adev, cursor.level);<br>
> -             pe_start = ((cursor.pfn >> shift) & mask) * 8;<br>
> -             entry_end = (mask + 1) << shift;<br>
> +             num_entries = amdgpu_vm_num_entries(adev, cursor.level);<br>
> +             pe_start = ((cursor.pfn >> shift) & (num_entries - 1)) * 8;<br>
> +             entry_end = num_entries << shift;<br>
>                entry_end += cursor.pfn & ~(entry_end - 1);<br>
>                entry_end = min(entry_end, end);<br>
>   <br>
<br>
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