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<p style="margin-top:0;margin-bottom:0">Series is:</p>
<p style="margin-top:0;margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Zhao, Yong<br>
<b>Sent:</b> Tuesday, October 23, 2018 2:15:59 PM<br>
<b>To:</b> brahma_sw_dev; amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Zhao, Yong<br>
<b>Subject:</b> [PATCH 2/2] drm/amdkfd: Use functions from amdgpu to invalidate vmid in kfd</font>
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<div class="PlainText">As part of the change, we stop taking the srbm lock, and start to use<br>
the same invalidation engine and software lock.<br>
<br>
Change-Id: I306305e43d4b4032316909b3f4e3f9f5ca4520ae<br>
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 37 +----------------------<br>
 1 file changed, 1 insertion(+), 36 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c<br>
index 3ade5d5..f4b4706 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c<br>
@@ -48,17 +48,6 @@<br>
 #include "soc15d.h"<br>
 #include "gmc_v9_0.h"<br>
 <br>
-/* HACK: MMHUB and GC both have VM-related register with the same<br>
- * names but different offsets. Define the MMHUB register we need here<br>
- * with a prefix. A proper solution would be to move the functions<br>
- * programming these registers into gfx_v9_0.c and mmhub_v1_0.c<br>
- * respectively.<br>
- */<br>
-#define mmMMHUB_VM_INVALIDATE_ENG16_REQ                                0x06f3<br>
-#define mmMMHUB_VM_INVALIDATE_ENG16_REQ_BASE_IDX               0<br>
-<br>
-#define mmMMHUB_VM_INVALIDATE_ENG16_ACK                                0x0705<br>
-#define mmMMHUB_VM_INVALIDATE_ENG16_ACK_BASE_IDX               0<br>
 <br>
 #define V9_PIPE_PER_MEC         (4)<br>
 #define V9_QUEUES_PER_PIPE_MEC  (8)<br>
@@ -742,15 +731,6 @@ static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd,<br>
 static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)<br>
 {<br>
         struct amdgpu_device *adev = (struct amdgpu_device *) kgd;<br>
-       uint32_t req = (1 << vmid) |<br>
-               (0 << VM_INVALIDATE_ENG16_REQ__FLUSH_TYPE__SHIFT) | /* legacy */<br>
-               VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PTES_MASK |<br>
-               VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PDE0_MASK |<br>
-               VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PDE1_MASK |<br>
-               VM_INVALIDATE_ENG16_REQ__INVALIDATE_L2_PDE2_MASK |<br>
-               VM_INVALIDATE_ENG16_REQ__INVALIDATE_L1_PTES_MASK;<br>
-<br>
-       mutex_lock(&adev->srbm_mutex);<br>
 <br>
         /* Use legacy mode tlb invalidation.<br>
          *<br>
@@ -767,22 +747,7 @@ static void write_vmid_invalidate_request(struct kgd_dev *kgd, uint8_t vmid)<br>
          * TODO 2: support range-based invalidation, requires kfg2kgd<br>
          * interface change<br>
          */<br>
-       WREG32(SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG16_REQ), req);<br>
-<br>
-       WREG32(SOC15_REG_OFFSET(MMHUB, 0, mmMMHUB_VM_INVALIDATE_ENG16_REQ),<br>
-                               req);<br>
-<br>
-       while (!(RREG32(SOC15_REG_OFFSET(GC, 0, mmVM_INVALIDATE_ENG16_ACK)) &<br>
-                                       (1 << vmid)))<br>
-               cpu_relax();<br>
-<br>
-       while (!(RREG32(SOC15_REG_OFFSET(MMHUB, 0,<br>
-                                       mmMMHUB_VM_INVALIDATE_ENG16_ACK)) &<br>
-                                       (1 << vmid)))<br>
-               cpu_relax();<br>
-<br>
-       mutex_unlock(&adev->srbm_mutex);<br>
-<br>
+       amdgpu_gmc_flush_gpu_tlb(adev, vmid, 0);<br>
 }<br>
 <br>
 static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t pasid)<br>
-- <br>
2.7.4<br>
<br>
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