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<p style="margin-top:0;margin-bottom:0">Thanks David.</p>
<p style="margin-top:0;margin-bottom:0">I think we can use ring->idx.</p>
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<p style="margin-top:0;margin-bottom:0">Best Regards</p>
<p style="margin-top:0;margin-bottom:0">Rex<br>
<br>
</p>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" color="#000000" face="Calibri, sans-serif"><b>From:</b> Zhou, David(ChunMing)<br>
<b>Sent:</b> Wednesday, October 24, 2018 2:55 PM<br>
<b>To:</b> Zhu, Rex; amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> RE: [PATCH v2] drm/amdgpu: Patch csa mc address in IB packet</font>
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<br>
> -----Original Message-----<br>
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Rex<br>
> Zhu<br>
> Sent: Wednesday, October 24, 2018 2:03 PM<br>
> To: amd-gfx@lists.freedesktop.org<br>
> Cc: Zhu, Rex <Rex.Zhu@amd.com><br>
> Subject: [PATCH v2] drm/amdgpu: Patch csa mc address in IB packet<br>
> <br>
> the csa buffer is used by sdma engine to do context save when preemption<br>
> happens. it the mc address is zero, mean the preemtpion feature(MCBP) is<br>
> disabled.<br>
> <br>
> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 13 +++++++++++++<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h | 2 ++<br>
> drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 8 ++++++--<br>
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 8 ++++++--<br>
> 4 files changed, 27 insertions(+), 4 deletions(-)<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c<br>
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c<br>
> index 0fb9907..24b80bc 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c<br>
> @@ -40,3 +40,16 @@ struct amdgpu_sdma_instance *<br>
> amdgpu_get_sdma_instance(struct amdgpu_ring *ring)<br>
> <br>
> return NULL;<br>
> }<br>
> +<br>
> +int amdgpu_get_sdma_index(struct amdgpu_ring *ring, uint32_t *index) {<br>
> + struct amdgpu_device *adev = ring->adev;<br>
> + int i;<br>
> +<br>
> + for (i = 0; i < adev->sdma.num_instances; i++)<br>
> + if (ring == &adev->sdma.instance[i].ring ||<br>
> + ring == &adev->sdma.instance[i].page)<br>
> + return i;<br>
> +<br>
> + return -EINVAL;<br>
> +}<br>
<br>
Loop for checking works, but looks not good.<br>
<br>
If you need ring index, you can define them first as enum, and evaluate enum index to ring when ring initializing.<br>
<br>
Regards,<br>
David Zhou<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h<br>
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h<br>
> index 479a245..314078a 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h<br>
> @@ -26,6 +26,7 @@<br>
> <br>
> /* max number of IP instances */<br>
> #define AMDGPU_MAX_SDMA_INSTANCES 2<br>
> +#define AMDGPU_SDMA_CSA_SIZE (1024)<br>
> <br>
> enum amdgpu_sdma_irq {<br>
> AMDGPU_SDMA_IRQ_TRAP0 = 0,<br>
> @@ -96,4 +97,5 @@ struct amdgpu_buffer_funcs { struct<br>
> amdgpu_sdma_instance * amdgpu_get_sdma_instance(struct amdgpu_ring<br>
> *ring);<br>
> <br>
> +int amdgpu_get_sdma_index(struct amdgpu_ring *ring, uint32_t *index);<br>
> #endif<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> index f5e6aa2..fdc5d75 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c<br>
> @@ -424,7 +424,11 @@ static void sdma_v3_0_ring_emit_ib(struct<br>
> amdgpu_ring *ring,<br>
> bool ctx_switch)<br>
> {<br>
> unsigned vmid = GET_VMID(job);<br>
> + uint64_t csa_mc_addr = job ? job->csa_mc_addr : 0;<br>
> + uint32_t i = 0;<br>
> <br>
> + if (amdgpu_get_sdma_index(ring, &i))<br>
> + return -EINVAL;<br>
> /* IB packet must end on a 8 DW boundary */<br>
> sdma_v3_0_ring_insert_nop(ring, (10 - (lower_32_bits(ring->wptr) &<br>
> 7)) % 8);<br>
> <br>
> @@ -434,8 +438,8 @@ static void sdma_v3_0_ring_emit_ib(struct<br>
> amdgpu_ring *ring,<br>
> amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);<br>
> amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));<br>
> amdgpu_ring_write(ring, ib->length_dw);<br>
> - amdgpu_ring_write(ring, 0);<br>
> - amdgpu_ring_write(ring, 0);<br>
> + amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr + i *<br>
> AMDGPU_SDMA_CSA_SIZE));<br>
> + amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr + i *<br>
> +AMDGPU_SDMA_CSA_SIZE));<br>
> <br>
> }<br>
> <br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
> b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
> index 2282ac1..e69a584 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
> @@ -507,7 +507,11 @@ static void sdma_v4_0_ring_emit_ib(struct<br>
> amdgpu_ring *ring,<br>
> bool ctx_switch)<br>
> {<br>
> unsigned vmid = GET_VMID(job);<br>
> + uint64_t csa_mc_addr = job ? job->csa_mc_addr : 0;<br>
> + uint32_t i = 0;<br>
> <br>
> + if (amdgpu_get_sdma_index(ring, &i))<br>
> + return -EINVAL;<br>
> /* IB packet must end on a 8 DW boundary */<br>
> sdma_v4_0_ring_insert_nop(ring, (10 - (lower_32_bits(ring->wptr) &<br>
> 7)) % 8);<br>
> <br>
> @@ -517,8 +521,8 @@ static void sdma_v4_0_ring_emit_ib(struct<br>
> amdgpu_ring *ring,<br>
> amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);<br>
> amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));<br>
> amdgpu_ring_write(ring, ib->length_dw);<br>
> - amdgpu_ring_write(ring, 0);<br>
> - amdgpu_ring_write(ring, 0);<br>
> + amdgpu_ring_write(ring, lower_32_bits(csa_mc_addr + i *<br>
> AMDGPU_SDMA_CSA_SIZE));<br>
> + amdgpu_ring_write(ring, upper_32_bits(csa_mc_addr + i *<br>
> +AMDGPU_SDMA_CSA_SIZE));<br>
> <br>
> }<br>
> <br>
> --<br>
> 1.9.1<br>
> <br>
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