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<p style="margin-top:0;margin-bottom:0">Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Rex Zhu <Rex.Zhu@amd.com><br>
<b>Sent:</b> Wednesday, October 24, 2018 10:55:08 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org; Russell, Kent<br>
<b>Cc:</b> Zhu, Rex<br>
<b>Subject:</b> [PATCH] drm/amd/pp: Fix pp_sclk/mclk_od not work on smu7</font>
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<div class="PlainText">not update the dpm table with user's setting<br>
<br>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com><br>
---<br>
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 10 ++++++----<br>
1 file changed, 6 insertions(+), 4 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
index 6c99cbf..71cfbd4 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c<br>
@@ -3588,9 +3588,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons<br>
break;<br>
}<br>
<br>
- if (i >= sclk_table->count)<br>
+ if (i >= sclk_table->count) {<br>
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK;<br>
- else {<br>
+ sclk_table->dpm_levels[i].value = sclk;<br>
+ } else {<br>
/* TODO: Check SCLK in DAL's minimum clocks<br>
* in case DeepSleep divider update is required.<br>
*/<br>
@@ -3605,9 +3606,10 @@ static int smu7_find_dpm_states_clocks_in_dpm_table(struct pp_hwmgr *hwmgr, cons<br>
break;<br>
}<br>
<br>
- if (i >= mclk_table->count)<br>
+ if (i >= mclk_table->count) {<br>
data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK;<br>
-<br>
+ mclk_table->dpm_levels[i-1].value = mclk;<br>
+ }<br>
<br>
if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)<br>
data->need_update_smu7_dpm_table |= DPMTABLE_UPDATE_MCLK;<br>
-- <br>
1.9.1<br>
<br>
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