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    <div class="moz-cite-prefix">Am 26.11.18 um 03:38 schrieb Zhang,
      Jerry(Junwei):<br>
    </div>
    <blockquote type="cite"
      cite="mid:b8a49f59-e466-b0e7-abf8-feedf1bf1946@amd.com">
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      On 11/24/18 3:32 AM, Deucher, Alexander wrote:<br>
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cite="mid:BN6PR12MB18091B4409C1DC5CD17F903CF7D40@BN6PR12MB1809.namprd12.prod.outlook.com">
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          <p style="margin-top:0;margin-bottom:0">Is this required?  Are
            the harvesting fuses incorrect?  If the blocks are
            harvested, we should bail out of the blocks properly during
            init.  Also, please make this more explicit if we still need
            it.  E.g.,</p>
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      <br>
      The harvest fuse is indeed disabling UVD and VCE, as it's a mining
      card.<br>
      Then any command to UVD/VCE causing NULL pointer issue, like
      amdgpu_test.<br>
    </blockquote>
    <br>
    In this case we should fix the NULL pointer issue instead. Do you
    have a backtrace for this?<br>
    <br>
    Regards,<br>
    Christian.<br>
    <br>
    <blockquote type="cite"
      cite="mid:b8a49f59-e466-b0e7-abf8-feedf1bf1946@amd.com"> <br>
      AFAIW, windows also disable UVD and VCE in initialization.<br>
      <br>
      <blockquote type="cite"
cite="mid:BN6PR12MB18091B4409C1DC5CD17F903CF7D40@BN6PR12MB1809.namprd12.prod.outlook.com">
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          <p style="margin-top:0;margin-bottom:0"><font size="2"><span
                style="font-size:11pt;">        if
                ((adev->pdev->device == 0x67df) &&<br>
                              (adev->pdev->revision == 0xf7)) {<br>
              </span></font></p>
          <p style="margin-top:0;margin-bottom:0"><font size="2"><span
                style="font-size:11pt;">        <font size="2"><span
                    style="font-size:11pt;">/* Some polaris12 variants
                    don't support UVD/VCE */</span></font><br>
              </span></font></p>
          <p style="margin-top:0;margin-bottom:0"><font size="2"><span
                style="font-size:11pt;">      } else  {<br>
              </span></font></p>
          <p style="margin-top:0;margin-bottom:0"><font size="2"><span
                style="font-size:11pt;">                
                amdgpu_device_ip_block_add(adev,
                &uvd_v6_3_ip_block);</span></font></p>
          <p style="margin-top:0;margin-bottom:0"><font size="2"><span
                style="font-size:11pt;">                
                amdgpu_device_ip_block_add(adev,
                &vce_v3_4_ip_block);</span></font></p>
          <p style="margin-top:0;margin-bottom:0">    }</p>
          <p style="margin-top:0;margin-bottom:0"><br>
          </p>
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      </blockquote>
      <br>
      OK, will explicit the process.<br>
      <br>
      Regards,<br>
      Jerry<br>
      <blockquote type="cite"
cite="mid:BN6PR12MB18091B4409C1DC5CD17F903CF7D40@BN6PR12MB1809.namprd12.prod.outlook.com">
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          <p style="margin-top:0;margin-bottom:0"> </p>
          <p style="margin-top:0;margin-bottom:0">That way if we
            re-arrange the order later, it will be easier to track.</p>
          <p style="margin-top:0;margin-bottom:0"><br>
          </p>
          <p style="margin-top:0;margin-bottom:0">Alex<br>
          </p>
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        <div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
            face="Calibri, sans-serif" color="#000000"><b>From:</b>
            amd-gfx <a class="moz-txt-link-rfc2396E"
              href="mailto:amd-gfx-bounces@lists.freedesktop.org"
              moz-do-not-send="true"><amd-gfx-bounces@lists.freedesktop.org></a>
            on behalf of Junwei Zhang <a class="moz-txt-link-rfc2396E"
              href="mailto:Jerry.Zhang@amd.com" moz-do-not-send="true"><Jerry.Zhang@amd.com></a><br>
            <b>Sent:</b> Friday, November 23, 2018 3:32:27 AM<br>
            <b>To:</b> <a class="moz-txt-link-abbreviated"
              href="mailto:amd-gfx@lists.freedesktop.org"
              moz-do-not-send="true">amd-gfx@lists.freedesktop.org</a><br>
            <b>Cc:</b> Zhang, Jerry<br>
            <b>Subject:</b> [PATCH] drm/amdgpu: disable UVD/VCE for some
            polaris 12 variants</font>
          <div> </div>
        </div>
        <div class="BodyFragment"><font size="2"><span
              style="font-size:11pt;">
              <div class="PlainText">Some variants don't support UVD and
                VCE.<br>
                <br>
                Signed-off-by: Junwei Zhang <a
                  class="moz-txt-link-rfc2396E"
                  href="mailto:Jerry.Zhang@amd.com"
                  moz-do-not-send="true"><Jerry.Zhang@amd.com></a><br>
                ---<br>
                 drivers/gpu/drm/amd/amdgpu/vi.c | 4 ++++<br>
                 1 file changed, 4 insertions(+)<br>
                <br>
                diff --git a/drivers/gpu/drm/amd/amdgpu/vi.c
                b/drivers/gpu/drm/amd/amdgpu/vi.c<br>
                index f3a4cf1f013a..3338b013ded4 100644<br>
                --- a/drivers/gpu/drm/amd/amdgpu/vi.c<br>
                +++ b/drivers/gpu/drm/amd/amdgpu/vi.c<br>
                @@ -1660,6 +1660,10 @@ int vi_set_ip_blocks(struct
                amdgpu_device *adev)<br>
                                        
                amdgpu_device_ip_block_add(adev,
                &dce_v11_2_ip_block);<br>
                                 amdgpu_device_ip_block_add(adev,
                &gfx_v8_0_ip_block);<br>
                                 amdgpu_device_ip_block_add(adev,
                &sdma_v3_1_ip_block);<br>
                +               /* Some polaris12 variants don't support
                UVD/VCE */<br>
                +               if ((adev->pdev->device == 0x67df)
                &&<br>
                +                     (adev->pdev->revision ==
                0xf7))<br>
                +                       break;<br>
                                 amdgpu_device_ip_block_add(adev,
                &uvd_v6_3_ip_block);<br>
                                 amdgpu_device_ip_block_add(adev,
                &vce_v3_4_ip_block);<br>
                                 break;<br>
                -- <br>
                2.17.1<br>
                <br>
                _______________________________________________<br>
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            </span></font></div>
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      <br>
      <br>
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      <pre class="moz-quote-pre" wrap="">_______________________________________________
amd-gfx mailing list
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</pre>
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