<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=us-ascii">
<style type="text/css" style="display:none;"><!-- P {margin-top:0;margin-bottom:0;} --></style>
</head>
<body dir="ltr">
<div id="divtagdefaultwrapper" style="font-size:12pt;color:#000000;font-family:Calibri,Helvetica,sans-serif;" dir="ltr">
<p style="margin-top:0;margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
</p>
</div>
<hr style="display:inline-block;width:98%" tabindex="-1">
<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Oak Zeng <ozeng@amd.com><br>
<b>Sent:</b> Friday, November 30, 2018 10:39:21 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Yang, Philip; Zeng, Oak; Yin, Tianci (Rico)<br>
<b>Subject:</b> [PATCH] drm/amdgpu: Fix num_doorbell calculation issue</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">When paging queue is enabled, it use the second page of doorbell.<br>
The AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the<br>
kernel doorbells are in the first page. So with paging queue enabled,<br>
the total kernel doorbell range should be original num_doorbell plus<br>
one page (0x400 in dword), not *2.<br>
<br>
Change-Id: I62023bb91da33ca5532b22b263771b587b796d59<br>
Signed-off-by: Oak Zeng <ozeng@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++++--<br>
1 file changed, 5 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
index 8eaa40e..c75badf 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br>
@@ -539,10 +539,13 @@ static int amdgpu_device_doorbell_init(struct amdgpu_device *adev)<br>
return -EINVAL;<br>
<br>
/* For Vega, reserve and map two pages on doorbell BAR since SDMA<br>
- * paging queue doorbell use the second page<br>
+ * paging queue doorbell use the second page. The<br>
+ * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the<br>
+ * doorbells are in the first page. So with paging queue enabled,<br>
+ * the max num_doorbells should + 1 page (0x400 in dword)<br>
*/<br>
if (adev->asic_type >= CHIP_VEGA10)<br>
- adev->doorbell.num_doorbells *= 2;<br>
+ adev->doorbell.num_doorbells += 0x400;<br>
<br>
adev->doorbell.ptr = ioremap(adev->doorbell.base,<br>
adev->doorbell.num_doorbells *<br>
-- <br>
2.7.4<br>
<br>
_______________________________________________<br>
amd-gfx mailing list<br>
amd-gfx@lists.freedesktop.org<br>
<a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><br>
</div>
</span></font></div>
</body>
</html>