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<p style="margin-top:0; margin-bottom:0">Series is:</p>
<p style="margin-top:0; margin-bottom:0">Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Evan Quan <evan.quan@amd.com><br>
<b>Sent:</b> Thursday, January 24, 2019 2:48:05 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Quan, Evan<br>
<b>Subject:</b> [PATCH 4/4] drm/amd/powerplay: support Vega12 retrieving and setting ppfeatures</font>
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<div class="PlainText">Enable retrieving and setting ppfeatures on Vega12.<br>
<br>
Change-Id: Idad5eaadbb9e7ea73edd9e9d4fe4e1a5b17fb7a6<br>
Signed-off-by: Evan Quan <evan.quan@amd.com><br>
---<br>
 .../drm/amd/powerplay/hwmgr/vega12_hwmgr.c    | 100 ++++++++++++++++++<br>
 1 file changed, 100 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c<br>
index 45a45669d2ec..342f8b81ca82 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c<br>
@@ -1933,6 +1933,104 @@ static int vega12_force_clock_level(struct pp_hwmgr *hwmgr,<br>
         return 0;<br>
 }<br>
 <br>
+static int vega12_get_ppfeature_status(struct pp_hwmgr *hwmgr, char *buf)<br>
+{<br>
+       static const char *ppfeature_name[] = {<br>
+                               "DPM_PREFETCHER",<br>
+                               "GFXCLK_DPM",<br>
+                               "UCLK_DPM",<br>
+                               "SOCCLK_DPM",<br>
+                               "UVD_DPM",<br>
+                               "VCE_DPM",<br>
+                               "ULV",<br>
+                               "MP0CLK_DPM",<br>
+                               "LINK_DPM",<br>
+                               "DCEFCLK_DPM",<br>
+                               "GFXCLK_DS",<br>
+                               "SOCCLK_DS",<br>
+                               "LCLK_DS",<br>
+                               "PPT",<br>
+                               "TDC",<br>
+                               "THERMAL",<br>
+                               "GFX_PER_CU_CG",<br>
+                               "RM",<br>
+                               "DCEFCLK_DS",<br>
+                               "ACDC",<br>
+                               "VR0HOT",<br>
+                               "VR1HOT",<br>
+                               "FW_CTF",<br>
+                               "LED_DISPLAY",<br>
+                               "FAN_CONTROL",<br>
+                               "DIDT",<br>
+                               "GFXOFF",<br>
+                               "CG",<br>
+                               "ACG"};<br>
+       static const char *output_title[] = {<br>
+                               "FEATURES",<br>
+                               "BITMASK",<br>
+                               "ENABLEMENT"};<br>
+       uint64_t features_enabled;<br>
+       int i;<br>
+       int ret = 0;<br>
+       int size = 0;<br>
+<br>
+       ret = vega12_get_enabled_smc_features(hwmgr, &features_enabled);<br>
+       PP_ASSERT_WITH_CODE(!ret,<br>
+                       "[EnableAllSmuFeatures] Failed to get enabled smc features!",<br>
+                       return ret);<br>
+<br>
+       size += sprintf(buf + size, "Current ppfeatures: 0x%016llx\n", features_enabled);<br>
+       size += sprintf(buf + size, "%-19s %-22s %s\n",<br>
+                               output_title[0],<br>
+                               output_title[1],<br>
+                               output_title[2]);<br>
+       for (i = 0; i < GNLD_FEATURES_MAX; i++) {<br>
+               size += sprintf(buf + size, "%-19s 0x%016llx %6s\n",<br>
+                                       ppfeature_name[i],<br>
+                                       1ULL << i,<br>
+                                       (features_enabled & (1ULL << i)) ? "Y" : "N");<br>
+       }<br>
+<br>
+       return size;<br>
+}<br>
+<br>
+static int vega12_set_ppfeature_status(struct pp_hwmgr *hwmgr, uint64_t new_ppfeature_masks)<br>
+{<br>
+       uint64_t features_enabled;<br>
+       uint64_t features_to_enable;<br>
+       uint64_t features_to_disable;<br>
+       int ret = 0;<br>
+<br>
+       if (new_ppfeature_masks >= (1ULL << GNLD_FEATURES_MAX))<br>
+               return -EINVAL;<br>
+<br>
+       ret = vega12_get_enabled_smc_features(hwmgr, &features_enabled);<br>
+       if (ret)<br>
+               return ret;<br>
+<br>
+       features_to_disable =<br>
+               (features_enabled ^ new_ppfeature_masks) & features_enabled;<br>
+       features_to_enable =<br>
+               (features_enabled ^ new_ppfeature_masks) ^ features_to_disable;<br>
+<br>
+       pr_debug("features_to_disable 0x%llx\n", features_to_disable);<br>
+       pr_debug("features_to_enable 0x%llx\n", features_to_enable);<br>
+<br>
+       if (features_to_disable) {<br>
+               ret = vega12_enable_smc_features(hwmgr, false, features_to_disable);<br>
+               if (ret)<br>
+                       return ret;<br>
+       }<br>
+<br>
+       if (features_to_enable) {<br>
+               ret = vega12_enable_smc_features(hwmgr, true, features_to_enable);<br>
+               if (ret)<br>
+                       return ret;<br>
+       }<br>
+<br>
+       return 0;<br>
+}<br>
+<br>
 static int vega12_print_clock_levels(struct pp_hwmgr *hwmgr,<br>
                 enum pp_clock_type type, char *buf)<br>
 {<br>
@@ -2528,6 +2626,8 @@ static const struct pp_hwmgr_func vega12_hwmgr_funcs = {<br>
         .start_thermal_controller = vega12_start_thermal_controller,<br>
         .powergate_gfx = vega12_gfx_off_control,<br>
         .get_performance_level = vega12_get_performance_level,<br>
+       .get_ppfeature_status = vega12_get_ppfeature_status,<br>
+       .set_ppfeature_status = vega12_set_ppfeature_status,<br>
 };<br>
 <br>
 int vega12_hwmgr_init(struct pp_hwmgr *hwmgr)<br>
-- <br>
2.20.1<br>
<br>
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