<div dir="ltr"><div>Can you also bump the KMS version?</div><div><br></div><div>Thanks,</div><div>Marek<br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Feb 1, 2019 at 3:09 PM Marek Olšák <<a href="mailto:maraeo@gmail.com">maraeo@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="ltr"><div>Reviewed-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com" target="_blank">marek.olsak@amd.com</a>></div><div>Tested-by: Marek Olšák <<a href="mailto:marek.olsak@amd.com" target="_blank">marek.olsak@amd.com</a>></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Fri, Feb 1, 2019 at 3:00 PM Andrey Grodzovsky <<a href="mailto:andrey.grodzovsky@amd.com" target="_blank">andrey.grodzovsky@amd.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">New chunk for dependency on start of job's execution instead on<br>
the end. This is used for GPU deadlock prevention when<br>
userspace uses mid-IB fences to wait for mid-IB work on other rings.<br>
<br>
v2: Fix typo in AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES<br>
<br>
Signed-off-by: Andrey Grodzovsky <<a href="mailto:andrey.grodzovsky@amd.com" target="_blank">andrey.grodzovsky@amd.com</a>><br>
Suggested-by: Christian Koenig <<a href="mailto:Christian.Koenig@amd.com" target="_blank">Christian.Koenig@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 12 +++++++++++-<br>
include/uapi/drm/amdgpu_drm.h | 1 +<br>
2 files changed, 12 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br>
index 1c49b82..3f21eca 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c<br>
@@ -214,6 +214,7 @@ static int amdgpu_cs_parser_init(struct amdgpu_cs_parser *p, union drm_amdgpu_cs<br>
case AMDGPU_CHUNK_ID_DEPENDENCIES:<br>
case AMDGPU_CHUNK_ID_SYNCOBJ_IN:<br>
case AMDGPU_CHUNK_ID_SYNCOBJ_OUT:<br>
+ case AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES:<br>
break;<br>
<br>
default:<br>
@@ -1090,6 +1091,14 @@ static int amdgpu_cs_process_fence_dep(struct amdgpu_cs_parser *p,<br>
<br>
fence = amdgpu_ctx_get_fence(ctx, entity,<br>
deps[i].handle);<br>
+<br>
+ if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {<br>
+ struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);<br>
+<br>
+ dma_fence_put(fence);<br>
+ fence = dma_fence_get(&s_fence->scheduled);<br>
+ }<br>
+<br>
if (IS_ERR(fence)) {<br>
r = PTR_ERR(fence);<br>
amdgpu_ctx_put(ctx);<br>
@@ -1177,7 +1186,8 @@ static int amdgpu_cs_dependencies(struct amdgpu_device *adev,<br>
<br>
chunk = &p->chunks[i];<br>
<br>
- if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES) {<br>
+ if (chunk->chunk_id == AMDGPU_CHUNK_ID_DEPENDENCIES ||<br>
+ chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {<br>
r = amdgpu_cs_process_fence_dep(p, chunk);<br>
if (r)<br>
return r;<br>
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h<br>
index faaad04..43d03a2 100644<br>
--- a/include/uapi/drm/amdgpu_drm.h<br>
+++ b/include/uapi/drm/amdgpu_drm.h<br>
@@ -526,6 +526,7 @@ struct drm_amdgpu_gem_va {<br>
#define AMDGPU_CHUNK_ID_SYNCOBJ_IN 0x04<br>
#define AMDGPU_CHUNK_ID_SYNCOBJ_OUT 0x05<br>
#define AMDGPU_CHUNK_ID_BO_HANDLES 0x06<br>
+#define AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES 0x07<br>
<br>
struct drm_amdgpu_cs_chunk {<br>
__u32 chunk_id;<br>
-- <br>
2.7.4<br>
<br>
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</blockquote></div>
</blockquote></div>