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yes,per submission bo list priority already is used by us. but per vm bo still is in fly, no priority on that.<br>
<br>
-David<br>
<br>
send from my phone<br>
<br>
-------- Original Message --------<br>
Subject: Re: [PATCH] drm/amdgpu: enable bo priority setting from user space<br>
From: "Koenig, Christian" <br>
To: "Zhou, David(ChunMing)" ,amd-gfx@lists.freedesktop.org<br>
CC: <br>
<br>
<div>
<div class="moz-cite-prefix">Well you can already use the per submission priority for the BOs.<br>
<br>
Additional to that as I said for per VM BOs we can add a priority to sort them in the LRU.<br>
<br>
Not sure how effective both of those actually are.<br>
<br>
Regards,<br>
Christian.<br>
<br>
Am 07.03.19 um 14:09 schrieb Zhou, David(ChunMing):<br>
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<div>Yes, you are right, thanks to point it out. Will see if there is other way.<br>
<br>
-David<br>
<br>
send from my phone<br>
<br>
-------- Original Message --------<br>
Subject: Re: [PATCH] drm/amdgpu: enable bo priority setting from user space<br>
From: Christian König <br>
To: "Zhou, David(ChunMing)" ,<a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
CC: <br>
<br>
</div>
<font size="2"><span style="font-size:11pt">
<div class="PlainText">Am 07.03.19 um 10:15 schrieb Chunming Zhou:<br>
> Signed-off-by: Chunming Zhou <a class="moz-txt-link-rfc2396E" href="mailto:david1.zhou@amd.com">
<david1.zhou@amd.com></a><br>
<br>
Well NAK to the whole approach.<br>
<br>
The TTM priority is a global priority, but processes are only allowed to <br>
specific the priority inside their own allocations. So this approach <br>
will never fly upstream.<br>
<br>
What you can do is to add a priority for per vm BOs to affect their sort <br>
order on the LRU, but I doubt that this will have much of an effect.<br>
<br>
Regards,<br>
Christian.<br>
<br>
> ---<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c | 1 +<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 13 +++++++++++++<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h | 2 +-<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-<br>
> drivers/gpu/drm/amd/amdgpu/amdgpu_object.h | 1 +<br>
> include/drm/ttm/ttm_bo_driver.h | 9 ++++++++-<br>
> include/uapi/drm/amdgpu_drm.h | 3 +++<br>
> 7 files changed, 29 insertions(+), 3 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c<br>
> index 5cbde74b97dd..70a6baf20c22 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c<br>
> @@ -144,6 +144,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,<br>
> size = mode_cmd->pitches[0] * height;<br>
> aligned_size = ALIGN(size, PAGE_SIZE);<br>
> ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,<br>
> + TTM_BO_PRIORITY_NORMAL,<br>
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |<br>
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |<br>
> AMDGPU_GEM_CREATE_VRAM_CLEARED,<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c<br>
> index d21dd2f369da..7c1c2362c67e 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c<br>
> @@ -44,6 +44,7 @@ void amdgpu_gem_object_free(struct drm_gem_object *gobj)<br>
> <br>
> int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,<br>
> int alignment, u32 initial_domain,<br>
> + enum ttm_bo_priority priority,<br>
> u64 flags, enum ttm_bo_type type,<br>
> struct reservation_object *resv,<br>
> struct drm_gem_object **obj)<br>
> @@ -60,6 +61,7 @@ int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,<br>
> bp.type = type;<br>
> bp.resv = resv;<br>
> bp.preferred_domain = initial_domain;<br>
> + bp.priority = priority;<br>
> retry:<br>
> bp.flags = flags;<br>
> bp.domain = initial_domain;<br>
> @@ -229,6 +231,14 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,<br>
> if (args->in.domains & ~AMDGPU_GEM_DOMAIN_MASK)<br>
> return -EINVAL;<br>
> <br>
> + /* check priority */<br>
> + if (args->in.priority == 0) {<br>
> + /* default is normal */<br>
> + args->in.priority = TTM_BO_PRIORITY_NORMAL;<br>
> + } else if (args->in.priority > TTM_MAX_BO_PRIORITY) {<br>
> + args->in.priority = TTM_MAX_BO_PRIORITY;<br>
> + DRM_ERROR("priority specified from user space is over MAX priority\n");<br>
> + }<br>
> /* create a gem object to contain this object in */<br>
> if (args->in.domains & (AMDGPU_GEM_DOMAIN_GDS |<br>
> AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {<br>
> @@ -252,6 +262,7 @@ int amdgpu_gem_create_ioctl(struct drm_device *dev, void *data,<br>
> <br>
> r = amdgpu_gem_object_create(adev, size, args->in.alignment,<br>
> (u32)(0xffffffff & args->in.domains),<br>
> + args->in.priority - 1,<br>
> flags, ttm_bo_type_device, resv, &gobj);<br>
> if (flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID) {<br>
> if (!r) {<br>
> @@ -304,6 +315,7 @@ int amdgpu_gem_userptr_ioctl(struct drm_device *dev, void *data,<br>
> <br>
> /* create a gem object to contain this object in */<br>
> r = amdgpu_gem_object_create(adev, args->size, 0, AMDGPU_GEM_DOMAIN_CPU,<br>
> + TTM_BO_PRIORITY_NORMAL,<br>
> 0, ttm_bo_type_device, NULL, &gobj);<br>
> if (r)<br>
> return r;<br>
> @@ -755,6 +767,7 @@ int amdgpu_mode_dumb_create(struct drm_file *file_priv,<br>
> domain = amdgpu_bo_get_preferred_pin_domain(adev,<br>
> amdgpu_display_supported_domains(adev));<br>
> r = amdgpu_gem_object_create(adev, args->size, 0, domain,<br>
> + TTM_BO_PRIORITY_NORMAL,<br>
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,<br>
> ttm_bo_type_device, NULL, &gobj);<br>
> if (r)<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h<br>
> index f1ddfc50bcc7..47b0a8190948 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h<br>
> @@ -61,7 +61,7 @@ extern const struct dma_buf_ops amdgpu_dmabuf_ops;<br>
> */<br>
> void amdgpu_gem_force_release(struct amdgpu_device *adev);<br>
> int amdgpu_gem_object_create(struct amdgpu_device *adev, unsigned long size,<br>
> - int alignment, u32 initial_domain,<br>
> + int alignment, u32 initial_domain, u32 priority,<br>
> u64 flags, enum ttm_bo_type type,<br>
> struct reservation_object *resv,<br>
> struct drm_gem_object **obj);<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br>
> index fd9c4beeaaa4..c85304e03021 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c<br>
> @@ -494,8 +494,9 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev,<br>
> <br>
> bo->tbo.bdev = &adev->mman.bdev;<br>
> amdgpu_bo_placement_from_domain(bo, bp->domain);<br>
> + bo->tbo.priority = bp->priority;<br>
> if (bp->type == ttm_bo_type_kernel)<br>
> - bo->tbo.priority = 1;<br>
> + bo->tbo.priority = TTM_BO_PRIORITY_VERYHIGH;<br>
> <br>
> r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type,<br>
> &bo->placement, page_align, &ctx, acc_size,<br>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h<br>
> index 9291c2f837e9..091a7884a821 100644<br>
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h<br>
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.h<br>
> @@ -39,6 +39,7 @@ struct amdgpu_bo_param {<br>
> int byte_align;<br>
> u32 domain;<br>
> u32 preferred_domain;<br>
> + u32 priority;<br>
> u64 flags;<br>
> enum ttm_bo_type type;<br>
> struct reservation_object *resv;<br>
> diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h<br>
> index cbf3180cb612..53f39ed540d7 100644<br>
> --- a/include/drm/ttm/ttm_bo_driver.h<br>
> +++ b/include/drm/ttm/ttm_bo_driver.h<br>
> @@ -43,7 +43,14 @@<br>
> #include "ttm_placement.h"<br>
> #include "ttm_tt.h"<br>
> <br>
> -#define TTM_MAX_BO_PRIORITY 4U<br>
> +enum ttm_bo_priority {<br>
> + TTM_BO_PRIORITY_VERYLOW = 0,<br>
> + TTM_BO_PRIORITY_LOW,<br>
> + TTM_BO_PRIORITY_NORMAL,<br>
> + TTM_BO_PRIORITY_HIGH,<br>
> + TTM_BO_PRIORITY_VERYHIGH,<br>
> + TTM_MAX_BO_PRIORITY<br>
> +};<br>
> <br>
> #define TTM_MEMTYPE_FLAG_FIXED (1 << 0) /* Fixed (on-card) PCI memory */<br>
> #define TTM_MEMTYPE_FLAG_MAPPABLE (1 << 1) /* Memory mappable */<br>
> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h<br>
> index b7718bfdf8ad..b74a7583d7f3 100644<br>
> --- a/include/uapi/drm/amdgpu_drm.h<br>
> +++ b/include/uapi/drm/amdgpu_drm.h<br>
> @@ -138,6 +138,9 @@ struct drm_amdgpu_gem_create_in {<br>
> __u64 domains;<br>
> /** allocation flags */<br>
> __u64 domain_flags;<br>
> + /** priority */<br>
> + __u32 priority;<br>
> + __u32 pad;<br>
> };<br>
> <br>
> struct drm_amdgpu_gem_create_out {<br>
<br>
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