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<div class="moz-cite-prefix">To be on the safe side I've adjusted
the code to work with any number of SDMA instances.<br>
<br>
Christian.<br>
<br>
Am 12.03.19 um 16:33 schrieb Deucher, Alexander:<br>
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I don't think Raven has a paging queue in the first place.</div>
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<br>
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<div style="font-family: Calibri, Arial, Helvetica, sans-serif;
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Alex<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
face="Calibri, sans-serif" color="#000000"><b>From:</b>
amd-gfx <a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org"><amd-gfx-bounces@lists.freedesktop.org></a> on
behalf of Kuehling, Felix <a class="moz-txt-link-rfc2396E" href="mailto:Felix.Kuehling@amd.com"><Felix.Kuehling@amd.com></a><br>
<b>Sent:</b> Tuesday, March 12, 2019 11:29 AM<br>
<b>To:</b> Christian König; <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Subject:</b> RE: [PATCH 2/3] drm/amdgpu: free up the first
paging queue</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span
style="font-size:11pt;">
<div class="PlainText">I think this would break Raven, which
only has one SDMA engine.<br>
<br>
Regards,<br>
Felix<br>
<br>
-----Original Message-----<br>
From: amd-gfx
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org"><amd-gfx-bounces@lists.freedesktop.org></a> On Behalf Of
Christian König<br>
Sent: Tuesday, March 12, 2019 8:38 AM<br>
To: <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
Subject: [PATCH 2/3] drm/amdgpu: free up the first paging
queue<br>
<br>
We need the first paging queue to handle page faults.<br>
<br>
Signed-off-by: Christian König
<a class="moz-txt-link-rfc2396E" href="mailto:christian.koenig@amd.com"><christian.koenig@amd.com></a><br>
---<br>
drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 20
++++++++++++--------<br>
1 file changed, 12 insertions(+), 8 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
index 3ac5abe937f4..bed18e7bbc36 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c<br>
@@ -2266,7 +2266,7 @@ static void
sdma_v4_0_set_buffer_funcs(struct amdgpu_device *adev) {<br>
adev->mman.buffer_funcs =
&sdma_v4_0_buffer_funcs;<br>
if (adev->sdma.has_page_queue)<br>
- adev->mman.buffer_funcs_ring =
&adev->sdma.instance[0].page;<br>
+ adev->mman.buffer_funcs_ring =
&adev->sdma.instance[1].page;<br>
else<br>
adev->mman.buffer_funcs_ring =
&adev->sdma.instance[0].ring; } @@ -2285,15
+2285,19 @@ static void sdma_v4_0_set_vm_pte_funcs(struct
amdgpu_device *adev)<br>
unsigned i;<br>
<br>
adev->vm_manager.vm_pte_funcs =
&sdma_v4_0_vm_pte_funcs;<br>
- for (i = 0; i < adev->sdma.num_instances;
i++) {<br>
- if (adev->sdma.has_page_queue)<br>
- sched =
&adev->sdma.instance[i].page.sched;<br>
- else<br>
- sched =
&adev->sdma.instance[i].ring.sched;<br>
- adev->vm_manager.vm_pte_rqs[i] =<br>
+ if (adev->sdma.has_page_queue) {<br>
+ sched =
&adev->sdma.instance[1].page.sched;<br>
+ adev->vm_manager.vm_pte_rqs[0] =<br>
&sched->sched_rq[DRM_SCHED_PRIORITY_KERNEL];<br>
+ adev->vm_manager.vm_pte_num_rqs = 1;<br>
+ } else {<br>
+ for (i = 0; i <
adev->sdma.num_instances; i++) {<br>
+ sched =
&adev->sdma.instance[i].ring.sched;<br>
+ adev->vm_manager.vm_pte_rqs[i]
=<br>
+
&sched->sched_rq[DRM_SCHED_PRIORITY_KERNEL];<br>
+ }<br>
+ adev->vm_manager.vm_pte_num_rqs =
adev->sdma.num_instances;<br>
}<br>
- adev->vm_manager.vm_pte_num_rqs =
adev->sdma.num_instances;<br>
}<br>
<br>
const struct amdgpu_ip_block_version sdma_v4_0_ip_block =
{<br>
--<br>
2.17.1<br>
<br>
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