<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=gb2312"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="blue" vlink="purple"> <div class="WordSection1"> Hi Alex<o:p></o:p> <o:p> </o:p> So sorry for my missing of you patch because the outlook on website didn’t show it. <o:p></o:p> <o:p> </o:p> Your patch seems cleaner and better. Can you help submit it ? Thanks in advance.<o:p></o:p> <o:p> </o:p> Reviewed-by: Yintian Tao<yttao@amd.com><o:p></o:p> <o:p> </o:p> <o:p> </o:p> Can <o:p></o:p> <o:p> </o:p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> From: Deucher, Alexander <Alexander.Deucher@amd.com> Sent: Saturday, May 18, 2019 1:07 AM To: Tao, Yintian <Yintian.Tao@amd.com>; Alex Deucher <alexdeucher@gmail.com> Cc: amd-gfx@lists.freedesktop.org; Koenig, Christian <Christian.Koenig@amd.com>; Huang, Trigger <Trigger.Huang@amd.com> Subject: Re: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov<o:p></o:p> </div> </div> <o:p> </o:p> <div> Did you see the patch I attached?<o:p></o:p> </div> <div> <o:p> </o:p> </div> <div> Alex<o:p></o:p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> From: Tao, Yintian Sent: Friday, May 17, 2019 10:51 AM To: Alex Deucher Cc: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>; Koenig, Christian; Deucher, Alexander; Huang, Trigger Subject: 答复: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov <o:p></o:p> <div> <o:p></o:p> </div> </div> <div> <div id="x_divtagdefaultwrapper"> Hi Alex<o:p></o:p> <o:p> </o:p> <o:p> </o:p> Many thanks for your review. I will merge these two patches into one and submit again.<o:p></o:p> <o:p> </o:p> <o:p> </o:p> Best Regards<o:p></o:p> Yintian Tao<o:p></o:p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="x_divRplyFwdMsg"> 发件人: Alex Deucher <<a href="mailto:alexdeucher@gmail.com">alexdeucher@gmail.com</a>> 发送时间: 2019年5月17日 22:34:30 收件人: Tao, Yintian 抄送: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>; Koenig, Christian; Deucher, Alexander; Huang, Trigger 主题: Re: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov <o:p></o:p> <div> <o:p></o:p> </div> </div> <div> <div> [CAUTION: External Email] How about combining these two patches into one? This seems cleaner. Alex On Thu, May 16, 2019 at 10:39 PM Tao, Yintian <<a href="mailto:Yintian.Tao@amd.com">Yintian.Tao@amd.com</a>> wrote: > > Ping... > > Hi Christian and Alex > > > Can you help review this? Thanks in advance. > > > Best Regards > Yintian Tao > > -----Original Message----- > From: Yintian Tao <<a href="mailto:yttao@amd.com">yttao@amd.com</a>> > Sent: Thursday, May 16, 2019 8:03 PM > To: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> > Cc: Tao, Yintian <<a href="mailto:Yintian.Tao@amd.com">Yintian.Tao@amd.com</a>>; Huang, Trigger <<a href="mailto:Trigger.Huang@amd.com">Trigger.Huang@amd.com</a>> > Subject: [PATCH] drm/amdgpu: set correct vram_width for vega10 under sriov > > For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN, and DF related registers is not readable, seems hardcord is the only way to set the correct vram_width > > Signed-off-by: Trigger Huang <<a href="mailto:Trigger.Huang@amd.com">Trigger.Huang@amd.com</a>> > Signed-off-by: Yintian Tao <<a href="mailto:yttao@amd.com">yttao@amd.com</a>> > --- > drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > index c221570..a417763 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c > @@ -848,6 +848,13 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev) > adev->gmc.vram_width = numchan * chansize; > } > > + /* For Vega10 SR-IOV, vram_width can't be read from ATOM as RAVEN, > + * and DF related registers is not readable, seems hardcord is the > + * only way to set the correct vram_width */ > + if (amdgpu_sriov_vf(adev) && (adev->asic_type == CHIP_VEGA10)) { > + adev->gmc.vram_width = 2048; > + } > + > /* size in MB on si */ > adev->gmc.mc_vram_size = > adev->nbio_funcs->get_memsize(adev) * 1024ULL * 1024ULL; > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> > <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a><o:p></o:p> </div> </div> </div> </div> </body> </html>