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<p class="MsoNormal"><span style="color:windowtext">Hi Leo,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext">Yes, I confirm it is the root cause
<b>for the Chrome S3 issue</b>. Whenever system is resumed, the original instruction always gets zero. However, I have no idea why it fails, and didn’t verify this problem on CRB or any other Linux platform yet.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext">Although I think the ideal solution is an indicator, e.g. a register, for driver to check if related firmware and hardware are ready to work. So driver can make sure it is ok to read rptr. Without any reference
document, I can only try to solve the problem by modifying driver. Debug traces reveal that only first rptr read fails, but the read in check loop is ok. Therefore, a solution comes to mind: to update rptr later for initial rptr value. Tests prove it working
in Chrome platforms. Fyi~<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext">BR,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext">Louis<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:windowtext"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="color:windowtext">From:</span></b><span style="color:windowtext"> Liu, Leo <Leo.Liu@amd.com>
<br>
<b>Sent:</b> Monday, May 27, 2019 9:01 PM<br>
<b>To:</b> S, Shirish <Shirish.S@amd.com>; Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com>; Zhang, Jerry <Jerry.Zhang@amd.com>; Deng, Emily <Emily.Deng@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com><br>
<b>Cc:</b> amd-gfx@lists.freedesktop.org; Li, Ching-shih (Louis) <Ching-shih.Li@amd.com><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: fix ring test failure issue during s3 in vce 3.0<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p><o:p> </o:p></p>
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<p class="MsoNormal">On 5/27/19 3:42 AM, S, Shirish wrote:<o:p></o:p></p>
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<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<pre>From: Louis Li <a href="mailto:Ching-shih.Li@amd.com"><Ching-shih.Li@amd.com></a><o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>[What]<o:p></o:p></pre>
<pre>vce ring test fails consistently during resume in s3 cycle, due to<o:p></o:p></pre>
<pre>mismatch read & write pointers.<o:p></o:p></pre>
<pre>On debug/analysis its found that rptr to be compared is not being<o:p></o:p></pre>
<pre>correctly updated/read, which leads to this failure.<o:p></o:p></pre>
<pre>Below is the failure signature:<o:p></o:p></pre>
<pre> [drm:amdgpu_vce_ring_test_ring] *ERROR* amdgpu: ring 12 test failed<o:p></o:p></pre>
<pre> [drm:amdgpu_device_ip_resume_phase2] *ERROR* resume of IP block <vce_v3_0> failed -110<o:p></o:p></pre>
<pre> [drm:amdgpu_device_resume] *ERROR* amdgpu_device_ip_resume failed (-110).<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>[How]<o:p></o:p></pre>
<pre>fetch rptr appropriately, meaning move its read location further down<o:p></o:p></pre>
<pre>in the code flow.<o:p></o:p></pre>
<pre>With this patch applied the s3 failure is no more seen for >5k s3 cycles,<o:p></o:p></pre>
<pre>which otherwise is pretty consistent.<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>Signed-off-by: Louis Li <a href="mailto:Ching-shih.Li@amd.com"><Ching-shih.Li@amd.com></a><o:p></o:p></pre>
<pre>---<o:p></o:p></pre>
<pre> drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 2 ++<o:p></o:p></pre>
<pre> 1 file changed, 2 insertions(+)<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c<o:p></o:p></pre>
<pre>index c021b11..92f9d46 100644<o:p></o:p></pre>
<pre>--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c<o:p></o:p></pre>
<pre>+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c<o:p></o:p></pre>
<pre>@@ -1084,6 +1084,8 @@ int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring)<o:p></o:p></pre>
<pre> if (r)<o:p></o:p></pre>
<pre> return r;<o:p></o:p></pre>
<pre> <o:p></o:p></pre>
<pre>+ rptr = amdgpu_ring_get_rptr(ring);<o:p></o:p></pre>
<pre>+<o:p></o:p></pre>
</blockquote>
<p>The rptr update is there:<o:p></o:p></p>
<pre><code> uint32_t rptr = amdgpu_ring_get_rptr(ring);<o:p></o:p></code></pre>
<pre><code><o:p> </o:p></code></pre>
<pre><code>Are you sure this is the root cause?<o:p></o:p></code></pre>
<pre><code><o:p> </o:p></code></pre>
<pre><code>Regards,<o:p></o:p></code></pre>
<pre><code>Leo<o:p></o:p></code></pre>
<pre><code><o:p> </o:p></code></pre>
<p><o:p> </o:p></p>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<pre><o:p> </o:p></pre>
<pre> amdgpu_ring_write(ring, VCE_CMD_END);<o:p></o:p></pre>
<pre> amdgpu_ring_commit(ring);<o:p></o:p></pre>
<pre> <o:p></o:p></pre>
</blockquote>
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