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<p>Reviewed-by: Bhawanpreet Lakha <a class="moz-txt-link-rfc2396E" href="mailto:Bhawanpreet.Lakha@amd.com">
<Bhawanpreet.Lakha@amd.com></a></p>
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<div class="moz-cite-prefix">On 2019-06-24 2:00 p.m., Deucher, Alexander wrote:<br>
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<blockquote type="cite" cite="mid:BN6PR12MB18091CE5FB4DD0A59853D849F7E00@BN6PR12MB1809.namprd12.prod.outlook.com">
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Acked-by: Alex Deucher <a class="moz-txt-link-rfc2396E" href="mailto:alexander.deucher@amd.com">
<alexander.deucher@amd.com></a><br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> amd-gfx
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org">
<amd-gfx-bounces@lists.freedesktop.org></a> on behalf of Nicholas Kazlauskas <a class="moz-txt-link-rfc2396E" href="mailto:nicholas.kazlauskas@amd.com">
<nicholas.kazlauskas@amd.com></a><br>
<b>Sent:</b> Monday, June 24, 2019 1:58 PM<br>
<b>To:</b> <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">
amd-gfx@lists.freedesktop.org</a><br>
<b>Cc:</b> Li, Sun peng (Leo); Wentland, Harry; Kazlauskas, Nicholas; Li, Roman<br>
<b>Subject:</b> [PATCH v2] drm/amd/display: update infoframe after dig fe is turned on (v2)</font>
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<div class="PlainText">[Why]<br>
The AVI infoframe is incorrectly programmed on DCN1/2 when enabling a<br>
stream - causing the wrong pixel encoding to be used for display.<br>
<br>
This is because the AVI infoframe is programmed before the DIG BE is<br>
connected to the FE and turned on, so enabling the AFMT block doesn't<br>
actually work and the registers subsequently can't be written to.<br>
<br>
[How]<br>
Program the infoframe *after* turning on the DIG FE. This was the<br>
behavior previously used but it was incorrectly reverted<br>
when adding the DCN2 HW sequencer code.<br>
<br>
v2: Don't call update_info_frame twice<br>
<br>
Fixes: 54ff35915948 ("drm/amd/display: Add DCN2 HW Sequencer and Resource")<br>
<br>
Cc: Harry Wentland <a class="moz-txt-link-rfc2396E" href="mailto:harry.wentland@amd.com">
<harry.wentland@amd.com></a><br>
Cc: Roman Li <a class="moz-txt-link-rfc2396E" href="mailto:roman.li@amd.com"><roman.li@amd.com></a><br>
Cc: Leo Li <a class="moz-txt-link-rfc2396E" href="mailto:sunpeng.li@amd.com"><sunpeng.li@amd.com></a><br>
Signed-off-by: Nicholas Kazlauskas <a class="moz-txt-link-rfc2396E" href="mailto:nicholas.kazlauskas@amd.com">
<nicholas.kazlauskas@amd.com></a><br>
---<br>
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c | 1 +<br>
1 file changed, 1 insertion(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c<br>
index 940e74b7d2c6..84d90b475e2a 100644<br>
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c<br>
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c<br>
@@ -686,6 +686,7 @@ void dce110_enable_stream(struct pipe_ctx *pipe_ctx)<br>
dmdata_dp : dmdata_hdmi);<br>
}<br>
#endif<br>
+ dce110_update_info_frame(pipe_ctx);<br>
<br>
/* enable early control to avoid corruption on DP monitor*/<br>
active_total_with_borders =<br>
-- <br>
2.17.1<br>
<br>
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<pre class="moz-quote-pre" wrap="">_______________________________________________
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