<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <style type="text/css" style="display:none;"></style> </head> <body dir="ltr"> <div id="divtagdefaultwrapper" style="font-size:12pt;color:#000000;font-family:Calibri,Helvetica,sans-serif;" dir="ltr"> <p style="margin-top:0;margin-bottom:0">Acked-by: Slava Abramov <slava.abramov@amd.com></p> </div> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Colin King <colin.king@canonical.com><br> <b>Sent:</b> Friday, June 28, 2019 10:33:20 AM<br> <b>To:</b> Zhang, Hawking; Deucher, Alexander; Koenig, Christian; Zhou, David(ChunMing); David Airlie; Daniel Vetter; amd-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org<br> <b>Cc:</b> kernel-janitors@vger.kernel.org; linux-kernel@vger.kernel.org<br> <b>Subject:</b> [PATCH] drm/amdgpu: fix a missing break in a switch statement</font> <div> </div> </div> <div class="BodyFragment"><font size="2"><span style="font-size:11pt;"> <div class="PlainText">From: Colin Ian King <colin.king@canonical.com><br> <br> Currently for the AMDGPU_IRQ_STATE_DISABLE there is a missing break<br> causing the code to fall through to the AMDGPU_IRQ_STATE_ENABLE case.<br> Fix this by adding in the missing break statement.<br> <br> Addresses-Coverity: ("Missing break in switch")<br> Fixes: a644d85a5cd4 ("drm/amdgpu: add gfx v10 implementation (v10)")<br> Signed-off-by: Colin Ian King <colin.king@canonical.com><br> ---<br> drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +<br> 1 file changed, 1 insertion(+)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br> index 2932ade7dbd0..c165200361b2 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br> @@ -4608,6 +4608,7 @@ gfx_v10_0_set_gfx_eop_interrupt_state(struct amdgpu_device *adev,<br> cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,<br> TIME_STAMP_INT_ENABLE, 0);<br> WREG32(cp_int_cntl_reg, cp_int_cntl);<br> + break;<br> case AMDGPU_IRQ_STATE_ENABLE:<br> cp_int_cntl = RREG32(cp_int_cntl_reg);<br> cp_int_cntl = REG_SET_FIELD(cp_int_cntl, CP_INT_CNTL_RING0,<br> -- <br> 2.20.1<br> <br> _______________________________________________<br> amd-gfx mailing list<br> amd-gfx@lists.freedesktop.org<br> <a href="https://lists.freedesktop.org/mailman/listinfo/amd-gfx">https://lists.freedesktop.org/mailman/listinfo/amd-gfx</a></div> </span></font></div> </body> </html>