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Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Evan Quan <evan.quan@amd.com><br>
<b>Sent:</b> Wednesday, July 17, 2019 5:34 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Deucher, Alexander; Xu, Feifei; Quan, Evan; Ma, Le<br>
<b>Subject:</b> [PATCH] drm/amd/powerplay: report bootup clock as max supported on dpm disabled</font>
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<div class="PlainText">With gfxclk or uclk dpm disabled, it's reasonable to report bootup clock<br>
as the max supported.<br>
<br>
Change-Id: If8aa7a912e8a34414b0e9c2b46de9b6e316fd9d7<br>
Signed-off-by: Evan Quan <evan.quan@amd.com><br>
---<br>
 drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 27 ++++++++++++++++++++++++++-<br>
 1 file changed, 26 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c<br>
index 5d5664f..d370b09 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c<br>
@@ -137,12 +137,37 @@ int smu_get_dpm_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,<br>
 {<br>
         int ret = 0, clk_id = 0;<br>
         uint32_t param = 0;<br>
+       uint32_t clock_limit;<br>
 <br>
         if (!min && !max)<br>
                 return -EINVAL;<br>
 <br>
-       if (!smu_clk_dpm_is_enabled(smu, clk_type))<br>
+       if (!smu_clk_dpm_is_enabled(smu, clk_type)) {<br>
+               switch (clk_type) {<br>
+               case SMU_MCLK:<br>
+               case SMU_UCLK:<br>
+                       clock_limit = smu->smu_table.boot_values.uclk;<br>
+                       break;<br>
+               case SMU_GFXCLK:<br>
+               case SMU_SCLK:<br>
+                       clock_limit = smu->smu_table.boot_values.gfxclk;<br>
+                       break;<br>
+               case SMU_SOCCLK:<br>
+                       clock_limit = smu->smu_table.boot_values.socclk;<br>
+                       break;<br>
+               default:<br>
+                       clock_limit = 0;<br>
+                       break;<br>
+               }<br>
+<br>
+               /* clock in Mhz unit */<br>
+               if (min)<br>
+                       *min = clock_limit / 100;<br>
+               if (max)<br>
+                       *max = clock_limit / 100;<br>
+<br>
                 return 0;<br>
+       }<br>
 <br>
         mutex_lock(&smu->mutex);<br>
         clk_id = smu_clk_get_index(smu, clk_type);<br>
-- <br>
2.7.4<br>
<br>
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