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<p class="MsoNormal">I’ll push this, I was just wondering if Felix could confirm if the TLB workaround was only for Tonga/Topaz, in which case we could check for that instead of having to expand the list in situations like this, to say “if FAMILY_VI && (TOPAZ
 || TONGA) then”. That way it’s explicitly applying the workaround to the affected ASICs instead of implicitly not-applying the workaround to unaffected ASICs.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Kent<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b>From:</b> Deucher, Alexander <Alexander.Deucher@amd.com> <br>
<b>Sent:</b> Tuesday, July 23, 2019 11:16 AM<br>
<b>To:</b> Russell, Kent <Kent.Russell@amd.com>; amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH] drm/amdkfd: Fix byte align on VegaM<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Reviewed-by: Alex Deucher <<a href="mailto:alexander.deucher@amd.com">alexander.deucher@amd.com</a>><o:p></o:p></span></p>
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<p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> amd-gfx <<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">amd-gfx-bounces@lists.freedesktop.org</a>> on behalf of Russell, Kent <<a href="mailto:Kent.Russell@amd.com">Kent.Russell@amd.com</a>><br>
<b>Sent:</b> Tuesday, July 23, 2019 10:22 AM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br>
<b>Cc:</b> Russell, Kent <<a href="mailto:Kent.Russell@amd.com">Kent.Russell@amd.com</a>><br>
<b>Subject:</b> [PATCH] drm/amdkfd: Fix byte align on VegaM</span> <o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal">This was missed during the addition of VegaM support<br>
<br>
Change-Id: I61c8fbbea77338126e3ebdfa74c286b665bdd670<br>
Signed-off-by: Kent Russell <<a href="mailto:kent.russell@amd.com">kent.russell@amd.com</a>><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 3 ++-<br>
 1 file changed, 2 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c<br>
index f5ecf28eb37c..3179117ac434 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c<br>
@@ -1139,7 +1139,8 @@ int amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(<br>
                         adev->asic_type != CHIP_FIJI &&<br>
                         adev->asic_type != CHIP_POLARIS10 &&<br>
                         adev->asic_type != CHIP_POLARIS11 &&<br>
-                       adev->asic_type != CHIP_POLARIS12) ?<br>
+                       adev->asic_type != CHIP_POLARIS12 &&<br>
+                       adev->asic_type != CHIP_VEGAM) ?<br>
                         VI_BO_SIZE_ALIGN : 1;<br>
 <br>
         mapping_flags = AMDGPU_VM_PAGE_READABLE;<br>
-- <br>
2.17.1<br>
<br>
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