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Reviewed-by: Kevin Wang <kevni1.wang@amd.com></div>
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Best Regards,<br>
Kevin</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Alex Deucher <alexdeucher@gmail.com><br>
<b>Sent:</b> Friday, August 2, 2019 4:29 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Quan, Evan <Evan.Quan@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com><br>
<b>Subject:</b> [PATCH 25/36] drm/amdgpu/smu11: add smu support for navi12</font>
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<div class="PlainText">From: Xiaojie Yuan <xiaojie.yuan@amd.com><br>
<br>
Same as other Navi asics.<br>
<br>
Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com><br>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com><br>
Reviewed-by: Evan Quan <evan.quan@amd.com><br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com><br>
---<br>
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 1 +<br>
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 6 ++++++<br>
2 files changed, 7 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c<br>
index 46976c90843b..5a613df174e6 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c<br>
@@ -720,6 +720,7 @@ static int smu_set_funcs(struct amdgpu_device *adev)<br>
case CHIP_VEGA20:<br>
case CHIP_NAVI10:<br>
case CHIP_NAVI14:<br>
+ case CHIP_NAVI12:<br>
case CHIP_ARCTURUS:<br>
if (adev->pm.pp_feature & PP_OVERDRIVE_MASK)<br>
smu->od_enabled = true;<br>
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
index 43fcbdbba630..84eb14a6650f 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
@@ -46,6 +46,7 @@ MODULE_FIRMWARE("amdgpu/vega20_smc.bin");<br>
MODULE_FIRMWARE("amdgpu/arcturus_smc.bin");<br>
MODULE_FIRMWARE("amdgpu/navi10_smc.bin");<br>
MODULE_FIRMWARE("amdgpu/navi14_smc.bin");<br>
+MODULE_FIRMWARE("amdgpu/navi12_smc.bin");<br>
<br>
#define SMU11_VOLTAGE_SCALE 4<br>
<br>
@@ -163,6 +164,9 @@ static int smu_v11_0_init_microcode(struct smu_context *smu)<br>
case CHIP_NAVI14:<br>
chip_name = "navi14";<br>
break;<br>
+ case CHIP_NAVI12:<br>
+ chip_name = "navi12";<br>
+ break;<br>
default:<br>
BUG();<br>
}<br>
@@ -1331,6 +1335,7 @@ static int smu_v11_0_gfx_off_control(struct smu_context *smu, bool enable)<br>
break;<br>
case CHIP_NAVI10:<br>
case CHIP_NAVI14:<br>
+ case CHIP_NAVI12:<br>
if (!(adev->pm.pp_feature & PP_GFXOFF_MASK))<br>
return 0;<br>
mutex_lock(&smu->mutex);<br>
@@ -1754,6 +1759,7 @@ void smu_v11_0_set_smu_funcs(struct smu_context *smu)<br>
break;<br>
case CHIP_NAVI10:<br>
case CHIP_NAVI14:<br>
+ case CHIP_NAVI12:<br>
navi10_set_ppt_funcs(smu);<br>
break;<br>
default:<br>
-- <br>
2.20.1<br>
<br>
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