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<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
i think we can use a function to retrieve this information without storing it separately.<br>
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likes: <i><span> ret = smu_get_atom_data_table(smu, index, &size, &frev, &crev,                                                                                                                      <br>
</span><span>                                      (uint8_t **)&header);  </span></i></div>
<div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">
<span>because these information is a generic information from atom_common_table_header.</span></div>
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<span>and other function don't care it except in smu_v11_0_get_clk_info_from_vbios.</span></div>
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Best Regards,<br>
Kevin</div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Evan Quan <evan.quan@amd.com><br>
<b>Sent:</b> Friday, August 16, 2019 2:08 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Quan, Evan <Evan.Quan@amd.com><br>
<b>Subject:</b> [PATCH 3/4] drm/amd/powerplay: get bootup fclk value</font>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">This is available with firmwareinfo table v3.2 or later.<br>
<br>
Change-Id: I223edf3c616b9e3e2527c752214fef5ab53d1cea<br>
Signed-off-by: Evan Quan <evan.quan@amd.com><br>
---<br>
 .../gpu/drm/amd/powerplay/inc/amdgpu_smu.h    |  3 +++<br>
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c     | 21 +++++++++++++++++++<br>
 2 files changed, 24 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h<br>
index ca9b9ec39de8..2c16eb412954 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h<br>
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h<br>
@@ -222,6 +222,9 @@ struct smu_bios_boot_up_values<br>
         uint16_t                        vdd_gfx;<br>
         uint8_t                         cooling_id;<br>
         uint32_t                        pp_table_id;<br>
+       uint32_t                        format_revision;<br>
+       uint32_t                        content_revision;<br>
+       uint32_t                        fclk;<br>
 };<br>
 <br>
 enum smu_table_id<br>
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
index 4a51de4ff162..df7b65360ac7 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
@@ -568,6 +568,9 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu)<br>
                 smu->smu_table.boot_values.pp_table_id = v_3_3->pplib_pptable_id;<br>
         }<br>
 <br>
+       smu->smu_table.boot_values.format_revision = header->format_revision;<br>
+       smu->smu_table.boot_values.content_revision = header->content_revision;<br>
+<br>
         return 0;<br>
 }<br>
 <br>
@@ -647,6 +650,24 @@ static int smu_v11_0_get_clk_info_from_vbios(struct smu_context *smu)<br>
         output = (struct atom_get_smu_clock_info_output_parameters_v3_1 *)&input;<br>
         smu->smu_table.boot_values.dclk = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 10000;<br>
 <br>
+       if ((smu->smu_table.boot_values.format_revision == 3) &&<br>
+           (smu->smu_table.boot_values.content_revision >= 2)) {<br>
+               memset(&input, 0, sizeof(input));<br>
+               input.clk_id = SMU11_SYSPLL1_0_FCLK_ID;<br>
+               input.syspll_id = SMU11_SYSPLL1_2_ID;<br>
+               input.command = GET_SMU_CLOCK_INFO_V3_1_GET_CLOCK_FREQ;<br>
+               index = get_index_into_master_table(atom_master_list_of_command_functions_v2_1,<br>
+                                                   getsmuclockinfo);<br>
+<br>
+               ret = amdgpu_atom_execute_table(adev->mode_info.atom_context, index,<br>
+                                               (uint32_t *)&input);<br>
+               if (ret)<br>
+                       return -EINVAL;<br>
+<br>
+               output = (struct atom_get_smu_clock_info_output_parameters_v3_1 *)&input;<br>
+               smu->smu_table.boot_values.fclk = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 10000;<br>
+       }<br>
+<br>
         return 0;<br>
 }<br>
 <br>
-- <br>
2.22.0<br>
<br>
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</span></font></div>
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