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<p class="MsoPlainText">Reviewed-by: Kenneth Feng <<a href="mailto:kenneth.feng@amd.com">kenneth.feng@amd.com</a>><o:p></o:p></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<div>
<div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b>From:</b> Quan, Evan <br>
<b>Sent:</b> Tuesday, August 20, 2019 10:10 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Cc:</b> Feng, Kenneth <Kenneth.Feng@amd.com>; Wang, Kevin(Yang) <Kevin1.Wang@amd.com><br>
<b>Subject:</b> RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Ping..<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt">
<div>
<div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b>From:</b> Quan, Evan <br>
<b>Sent:</b> Monday, August 19, 2019 1:27 PM<br>
<b>To:</b> Feng, Kenneth <<a href="mailto:Kenneth.Feng@amd.com">Kenneth.Feng@amd.com</a>>; Wang, Kevin(Yang) <<a href="mailto:Kevin1.Wang@amd.com">Kevin1.Wang@amd.com</a>>;
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Subject:</b> RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Yes, the lowest settings for thermal controller is 0.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Regards<o:p></o:p></p>
<p class="MsoNormal">Evan<o:p></o:p></p>
<div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt">
<div>
<div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b>From:</b> Feng, Kenneth <<a href="mailto:Kenneth.Feng@amd.com">Kenneth.Feng@amd.com</a>>
<br>
<b>Sent:</b> Monday, August 19, 2019 1:12 PM<br>
<b>To:</b> Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>>; Wang, Kevin(Yang) <<a href="mailto:Kevin1.Wang@amd.com">Kevin1.Wang@amd.com</a>>;
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Subject:</b> RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span style="color:#1F497D">Hi Evan,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D">So due to the below code, we don’t get a chance to set -273.15, right?<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt">+ low = max(SMU_THERMAL_MINIMUM_ALERT_TEMP,<br>
+ range.min / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES);<br>
+ high = min(SMU_THERMAL_MAXIMUM_ALERT_TEMP,<br>
+ range.max / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES);<span style="color:#1F497D"><o:p></o:p></span></p>
<p class="MsoNormal"><span style="color:#1F497D"><o:p> </o:p></span></p>
<div>
<div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b>From:</b> amd-gfx [<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">mailto:amd-gfx-bounces@lists.freedesktop.org</a>]
<b>On Behalf Of </b>Quan, Evan<br>
<b>Sent:</b> Monday, August 19, 2019 10:16 AM<br>
<b>To:</b> Wang, Kevin(Yang) <<a href="mailto:Kevin1.Wang@amd.com">Kevin1.Wang@amd.com</a>>;
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Subject:</b> RE: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;font-family:"Times New Roman",serif">[CAUTION: External Email]
<o:p></o:p></span></p>
<div>
<p class="MsoNormal">Comment inline<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<div style="border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt">
<div>
<div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in">
<p class="MsoNormal"><b>From:</b> Wang, Kevin(Yang) <<a href="mailto:Kevin1.Wang@amd.com">Kevin1.Wang@amd.com</a>>
<br>
<b>Sent:</b> Friday, August 16, 2019 7:04 PM<br>
<b>To:</b> Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>>;
<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
<b>Subject:</b> Re: [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings<o:p></o:p></p>
</div>
</div>
<p class="MsoNormal"><o:p> </o:p></p>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Hi Evan,<o:p></o:p></span></p>
</div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p>
</div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">the temperature min value should be 0, not -273 on smu11.<o:p></o:p></span></p>
</div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">you can refrence window driver code or register spec.<o:p></o:p></span></p>
</div>
<div>
<p class="MsoNormal"><i><span style="font-size:12.0pt;color:black"> output_ptr->operating_temperature_min_Limit = 0;
<br>
output_ptr->operating_temperature_max_Limit = ppt_info->software_shutdown_temp;<o:p></o:p></span></i></p>
<p class="MsoNormal"><b><i>[Quan, Evan] There was a discussion over the min value(0 or -273.15) and we decided to use the later considering the OD case.<o:p></o:p></i></b></p>
<p class="MsoNormal"><b><i>All the existing and coming ASICs should follow this design.</i></b><o:p></o:p></p>
</div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">and in smu11, the thermal control has a 8bit register to set min and max value, and the unit is temperature.<o:p></o:p></span></p>
<p class="MsoNormal"><b><i>[Quan, Evan] That is still honored, no violation here.</i></b><o:p></o:p></p>
</div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">so there is something wrong with this patch.<o:p></o:p></span></p>
</div>
<div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p>
</div>
</div>
<div>
<p class="MsoNormal"><span style="font-size:12.0pt;color:black">Best Regards,<br>
Kevin<o:p></o:p></span></p>
</div>
<div class="MsoNormal" align="center" style="text-align:center">
<hr size="2" width="98%" align="center">
</div>
<div id="divRplyFwdMsg">
<p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> amd-gfx <<a href="mailto:amd-gfx-bounces@lists.freedesktop.org">amd-gfx-bounces@lists.freedesktop.org</a>> on behalf of Evan Quan <<a href="mailto:evan.quan@amd.com">evan.quan@amd.com</a>><br>
<b>Sent:</b> Friday, August 16, 2019 5:31 PM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br>
<b>Cc:</b> Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>><br>
<b>Subject:</b> [PATCH] drm/amd/powerplay: correct SW smu11 thermal range settings</span>
<o:p></o:p></p>
<div>
<p class="MsoNormal"> <o:p></o:p></p>
</div>
</div>
<div>
<div>
<p class="MsoNormal">Problems with current settings:<br>
1. The min value was overrided to 0 on Vega20 & Navi10. While<br>
the expected should be -273.15 C.<br>
2. The thermal min/max threshold was output in wrong unit on<br>
Navi10 & Arcturus. As TEMP_RANGE_MIN/MAX is already in<br>
millicelsius. And "*1000" in smu_v11_0_start_thermal_control<br>
makes the output wrongly.<br>
<br>
Change-Id: I2f1866edd1baf264f521310343f492eaede26c33<br>
Signed-off-by: Evan Quan <<a href="mailto:evan.quan@amd.com">evan.quan@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 10 ----<br>
drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h | 6 +++<br>
drivers/gpu/drm/amd/powerplay/navi10_ppt.c | 5 +-<br>
drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 51 +++++++------------<br>
drivers/gpu/drm/amd/powerplay/vega20_ppt.c | 20 +++++---<br>
5 files changed, 38 insertions(+), 54 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c<br>
index 4060607fbb35..1a1f64a9e1e0 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c<br>
@@ -880,23 +880,14 @@ static int arcturus_force_clk_levels(struct smu_context *smu,<br>
return ret;<br>
}<br>
<br>
-static const struct smu_temperature_range arcturus_thermal_policy[] =<br>
-{<br>
- {-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},<br>
- { 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000},<br>
-};<br>
-<br>
static int arcturus_get_thermal_temperature_range(struct smu_context *smu,<br>
struct smu_temperature_range *range)<br>
{<br>
-<br>
PPTable_t *pptable = smu->smu_table.driver_pptable;<br>
<br>
if (!range)<br>
return -EINVAL;<br>
<br>
- memcpy(range, &arcturus_thermal_policy[0], sizeof(struct smu_temperature_range));<br>
-<br>
range->max = pptable->TedgeLimit *<br>
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *<br>
@@ -910,7 +901,6 @@ static int arcturus_get_thermal_temperature_range(struct smu_context *smu,<br>
range->mem_emergency_max = (pptable->TmemLimit + CTF_OFFSET_HBM)*<br>
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
<br>
-<br>
return 0;<br>
}<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h<br>
index 0a22fa48ff5a..59b2045e37e4 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h<br>
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h<br>
@@ -64,6 +64,12 @@<br>
#define WORKLOAD_MAP(profile, workload) \<br>
[profile] = {1, (workload)}<br>
<br>
+static const struct smu_temperature_range smu11_thermal_policy[] =<br>
+{<br>
+ {-273150, 99000, 99000, -273150, 99000, 99000, -273150, 99000, 99000},<br>
+ { 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000, 120000},<br>
+};<br>
+<br>
struct smu_11_0_cmn2aisc_mapping {<br>
int valid_mapping;<br>
int map_to;<br>
diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c<br>
index d7d4186b762f..e804d18f61d0 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c<br>
@@ -1505,9 +1505,8 @@ static int navi10_get_thermal_temperature_range(struct smu_context *smu,<br>
if (!range || !powerplay_table)<br>
return -EINVAL;<br>
<br>
- /* The unit is temperature */<br>
- range->min = 0;<br>
- range->max = powerplay_table->software_shutdown_temp;<br>
+ range->max = powerplay_table->software_shutdown_temp *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
<br>
return 0;<br>
}<br>
diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
index df7b65360ac7..5f5fd3a88e48 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
@@ -1125,23 +1125,17 @@ static int smu_v11_0_get_current_clk_freq(struct smu_context *smu,<br>
}<br>
<br>
static int smu_v11_0_set_thermal_range(struct smu_context *smu,<br>
- struct smu_temperature_range *range)<br>
+ struct smu_temperature_range range)<br>
{<br>
struct amdgpu_device *adev = smu->adev;<br>
int low = SMU_THERMAL_MINIMUM_ALERT_TEMP;<br>
int high = SMU_THERMAL_MAXIMUM_ALERT_TEMP;<br>
uint32_t val;<br>
<br>
- if (!range)<br>
- return -EINVAL;<br>
-<br>
- if (low < range->min)<br>
- low = range->min;<br>
- if (high > range->max)<br>
- high = range->max;<br>
-<br>
- low = max(SMU_THERMAL_MINIMUM_ALERT_TEMP, range->min);<br>
- high = min(SMU_THERMAL_MAXIMUM_ALERT_TEMP, range->max);<br>
+ low = max(SMU_THERMAL_MINIMUM_ALERT_TEMP,<br>
+ range.min / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES);<br>
+ high = min(SMU_THERMAL_MAXIMUM_ALERT_TEMP,<br>
+ range.max / SMU_TEMPERATURE_UNITS_PER_CENTIGRADES);<br>
<br>
if (low > high)<br>
return -EINVAL;<br>
@@ -1177,27 +1171,20 @@ static int smu_v11_0_enable_thermal_alert(struct smu_context *smu)<br>
static int smu_v11_0_start_thermal_control(struct smu_context *smu)<br>
{<br>
int ret = 0;<br>
- struct smu_temperature_range range = {<br>
- TEMP_RANGE_MIN,<br>
- TEMP_RANGE_MAX,<br>
- TEMP_RANGE_MAX,<br>
- TEMP_RANGE_MIN,<br>
- TEMP_RANGE_MAX,<br>
- TEMP_RANGE_MAX,<br>
- TEMP_RANGE_MIN,<br>
- TEMP_RANGE_MAX,<br>
- TEMP_RANGE_MAX};<br>
+ struct smu_temperature_range range;<br>
struct amdgpu_device *adev = smu->adev;<br>
<br>
if (!smu->pm_enabled)<br>
return ret;<br>
<br>
+ memcpy(&range, &smu11_thermal_policy[0], sizeof(struct smu_temperature_range));<br>
+<br>
ret = smu_get_thermal_temperature_range(smu, &range);<br>
if (ret)<br>
return ret;<br>
<br>
if (smu->smu_table.thermal_controller_type) {<br>
- ret = smu_v11_0_set_thermal_range(smu, &range);<br>
+ ret = smu_v11_0_set_thermal_range(smu, range);<br>
if (ret)<br>
return ret;<br>
<br>
@@ -1210,17 +1197,15 @@ static int smu_v11_0_start_thermal_control(struct smu_context *smu)<br>
return ret;<br>
}<br>
<br>
- adev->pm.dpm.thermal.min_temp = range.min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_temp = range.max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.min_mem_temp = range.mem_min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.min_temp = range.min * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
- adev->pm.dpm.thermal.max_temp = range.max * SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
+ adev->pm.dpm.thermal.min_temp = range.min;<br>
+ adev->pm.dpm.thermal.max_temp = range.max;<br>
+ adev->pm.dpm.thermal.max_edge_emergency_temp = range.edge_emergency_max;<br>
+ adev->pm.dpm.thermal.min_hotspot_temp = range.hotspot_min;<br>
+ adev->pm.dpm.thermal.max_hotspot_crit_temp = range.hotspot_crit_max;<br>
+ adev->pm.dpm.thermal.max_hotspot_emergency_temp = range.hotspot_emergency_max;<br>
+ adev->pm.dpm.thermal.min_mem_temp = range.mem_min;<br>
+ adev->pm.dpm.thermal.max_mem_crit_temp = range.mem_crit_max;<br>
+ adev->pm.dpm.thermal.max_mem_emergency_temp = range.mem_emergency_max;<br>
<br>
return ret;<br>
}<br>
diff --git a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c<br>
index acf075393c13..e14363182691 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/vega20_ppt.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/vega20_ppt.c<br>
@@ -3113,14 +3113,18 @@ static int vega20_get_thermal_temperature_range(struct smu_context *smu,<br>
if (!range || !powerplay_table)<br>
return -EINVAL;<br>
<br>
- /* The unit is temperature */<br>
- range->min = 0;<br>
- range->max = powerplay_table->usSoftwareShutdownTemp;<br>
- range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE);<br>
- range->hotspot_crit_max = pptable->ThotspotLimit;<br>
- range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT);<br>
- range->mem_crit_max = pptable->ThbmLimit;<br>
- range->mem_emergency_max = (pptable->ThbmLimit + CTF_OFFSET_HBM);<br>
+ range->max = powerplay_table->usSoftwareShutdownTemp *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
+ range->edge_emergency_max = (pptable->TedgeLimit + CTF_OFFSET_EDGE) *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
+ range->hotspot_crit_max = pptable->ThotspotLimit *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
+ range->hotspot_emergency_max = (pptable->ThotspotLimit + CTF_OFFSET_HOTSPOT) *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
+ range->mem_crit_max = pptable->ThbmLimit *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
+ range->mem_emergency_max = (pptable->ThbmLimit + CTF_OFFSET_HBM) *<br>
+ SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;<br>
<br>
<br>
return 0;<br>
-- <br>
2.22.0<br>
<br>
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