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Does some variant of the patch on this thread help?</div>
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<a href="https://patchwork.freedesktop.org/patch/333068/" id="LPlnk108271">https://patchwork.freedesktop.org/patch/333068/</a></div>
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Alex<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@amd.com><br>
<b>Sent:</b> Thursday, October 3, 2019 4:25 AM<br>
<b>To:</b> Koenig, Christian <Christian.Koenig@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> Re: [PATCH] drm/amdgpu: do not execute 0-sized IBs</font>
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On 03/10/2019 10:09, Christian König wrote:<br>
> Am 03.10.19 um 10:03 schrieb Pelloux-prayer, Pierre-eric:<br>
>> This can be safely skipped entirely.<br>
>> This seems to help with <a href="https://bugs.freedesktop.org/show_bug.cgi?id=111481">
https://bugs.freedesktop.org/show_bug.cgi?id=111481</a>.<br>
> <br>
> NAK, please instead fix gmc_v10_0_flush_gpu_tlb to include at least some NOP in the submitted IBs.<br>
<br>
Is there any interest in executing an empty (or only filled with NOPs) IB?<br>
<br>
Anyway I can modify the patch to do this.<br>
<br>
Thanks,<br>
Pierre-Eric<br>
<br>
> <br>
> Christian.<br>
> <br>
>><br>
>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com><br>
>> ---<br>
>> drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 5 +++++<br>
>> 1 file changed, 5 insertions(+)<br>
>><br>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c<br>
>> index 60655834d649..aa163e679f1f 100644<br>
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c<br>
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c<br>
>> @@ -227,6 +227,11 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,<br>
>> !amdgpu_sriov_vf(adev)) /* for SRIOV preemption, Preamble CE ib must be inserted anyway */<br>
>> continue;<br>
>> + if (ib->length_dw == 0) {<br>
>> + /* On Navi gmc_v10_0_flush_gpu_tlb emits 0 sized IB */<br>
>> + continue;<br>
>> + }<br>
>> +<br>
>> amdgpu_ring_emit_ib(ring, job, ib, status);<br>
>> status &= ~AMDGPU_HAVE_CTX_SWITCH;<br>
>> }<br>
> <br>
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