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<div class="moz-cite-prefix">Good catch! Reviewed-by: Christian
König <a class="moz-txt-link-rfc2396E" href="mailto:christian.koenig@amd.com"><christian.koenig@amd.com></a><br>
<br>
Am 09.10.19 um 19:11 schrieb Deucher, Alexander:<br>
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Reviewed-by: Alex Deucher <a class="moz-txt-link-rfc2396E" href="mailto:alexander.deucher@amd.com"><alexander.deucher@amd.com></a><br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
face="Calibri, sans-serif" color="#000000"><b>From:</b>
amd-gfx <a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org"><amd-gfx-bounces@lists.freedesktop.org></a> on
behalf of Yuan, Xiaojie <a class="moz-txt-link-rfc2396E" href="mailto:Xiaojie.Yuan@amd.com"><Xiaojie.Yuan@amd.com></a><br>
<b>Sent:</b> Wednesday, October 9, 2019 1:09 PM<br>
<b>To:</b> <a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>
<a class="moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"><amd-gfx@lists.freedesktop.org></a><br>
<b>Cc:</b> Xiao, Jack <a class="moz-txt-link-rfc2396E" href="mailto:Jack.Xiao@amd.com"><Jack.Xiao@amd.com></a>; Yuan, Xiaojie
<a class="moz-txt-link-rfc2396E" href="mailto:Xiaojie.Yuan@amd.com"><Xiaojie.Yuan@amd.com></a>; Zhang, Hawking
<a class="moz-txt-link-rfc2396E" href="mailto:Hawking.Zhang@amd.com"><Hawking.Zhang@amd.com></a><br>
<b>Subject:</b> [PATCH] drm/amdgpu/sdma5: fix mask value of
POLL_REGMEM packet for pipe sync</font>
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<div class="PlainText">sdma will hang once sequence number
to be polled reaches 0x1000_0000<br>
<br>
Signed-off-by: Xiaojie Yuan <a class="moz-txt-link-rfc2396E" href="mailto:xiaojie.yuan@amd.com"><xiaojie.yuan@amd.com></a><br>
---<br>
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 +-<br>
1 file changed, 1 insertion(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br>
index ad5c3566337c..3460c00f3eaa 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c<br>
@@ -1126,7 +1126,7 @@ static void
sdma_v5_0_ring_emit_pipeline_sync(struct amdgpu_ring
*ring)<br>
amdgpu_ring_write(ring, addr & 0xfffffffc);<br>
amdgpu_ring_write(ring, upper_32_bits(addr) &
0xffffffff);<br>
amdgpu_ring_write(ring, seq); /* reference */<br>
- amdgpu_ring_write(ring, 0xfffffff); /* mask */<br>
+ amdgpu_ring_write(ring, 0xffffffff); /* mask */<br>
amdgpu_ring_write(ring,
SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |<br>
SDMA_PKT_POLL_REGMEM_DW5_INTERVAL(4)); /* retry count,
poll interval */<br>
}<br>
-- <br>
2.20.1<br>
<br>
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<pre class="moz-quote-pre" wrap="">_______________________________________________
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