<html xmlns:v="urn:schemas-microsoft-com:vml" xmlns:o="urn:schemas-microsoft-com:office:office" xmlns:w="urn:schemas-microsoft-com:office:word" xmlns:m="http://schemas.microsoft.com/office/2004/12/omml" xmlns="http://www.w3.org/TR/REC-html40"> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <meta name="Generator" content="Microsoft Word 15 (filtered medium)"> <style></style> </head> <body lang="EN-US" link="#0563C1" vlink="#954F72"> <div class="WordSection1"> <p class="MsoNormal">Yes that’s correct. This should fix the issue.<o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <p class="MsoNormal">Jon<o:p></o:p></p> <p class="MsoNormal"><o:p> </o:p></p> <div> <div style="border:none;border-top:solid #E1E1E1 1.0pt;padding:3.0pt 0in 0in 0in"> <p class="MsoNormal"><b>From:</b> Strawbridge, Michael <Michael.Strawbridge@amd.com> <br> <b>Sent:</b> Tuesday, November 5, 2019 11:40 AM<br> <b>To:</b> Kim, Jonathan <Jonathan.Kim@amd.com>; Quan, Evan <Evan.Quan@amd.com>; amd-gfx@lists.freedesktop.org<br> <b>Subject:</b> Re: [PATCH 2/2] drm/amdgpu: perform p-state switch after the whole hive initialized<o:p></o:p></p> </div> </div> <p class="MsoNormal"><o:p> </o:p></p> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black">Hi Jon,<o:p></o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black">Does that mean we can simply use this instead?<o:p></o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-family:"Segoe UI",sans-serif;color:black;background:white">+ if (mgpu_info.num_dgpu == adev->gmc.xgmi.num_physical_nodes<b> - 1</b>) {</span><span style="font-size:12.0pt;color:black"><o:p></o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black"><o:p> </o:p></span></p> </div> <div> <p class="MsoNormal"><span style="color:black">Thanks,<o:p></o:p></span></p> </div> <div> <p class="MsoNormal"><span style="font-size:12.0pt;color:black">Michael<o:p></o:p></span></p> </div> <div class="MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="divRplyFwdMsg"> <p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Kim, Jonathan <<a href="mailto:Jonathan.Kim@amd.com">Jonathan.Kim@amd.com</a>><br> <b>Sent:</b> 05 November 2019 11:32 AM<br> <b>To:</b> Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>>; <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br> <b>Cc:</b> Strawbridge, Michael <<a href="mailto:Michael.Strawbridge@amd.com">Michael.Strawbridge@amd.com</a>><br> <b>Subject:</b> RE: [PATCH 2/2] drm/amdgpu: perform p-state switch after the whole hive initialized</span> <o:p></o:p></p> <div> <p class="MsoNormal"> <o:p></o:p></p> </div> </div> <div> <div> <p class="MsoNormal" style="margin-bottom:12.0pt">Please see inline.<br> <br> Jon<br> <br> -----Original Message-----<br> From: Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>> <br> Sent: Tuesday, November 5, 2019 5:24 AM<br> To: <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br> Cc: Kim, Jonathan <<a href="mailto:Jonathan.Kim@amd.com">Jonathan.Kim@amd.com</a>>; Strawbridge, Michael <<a href="mailto:Michael.Strawbridge@amd.com">Michael.Strawbridge@amd.com</a>>; Quan, Evan <<a href="mailto:Evan.Quan@amd.com">Evan.Quan@amd.com</a>><br> Subject: [PATCH 2/2] drm/amdgpu: perform p-state switch after the whole hive initialized<br> <br> P-state switch should be performed after all devices from the hive get initialized.<br> <br> Change-Id: Ifc7cac9ef0cf250447d2a412da35d601e2ac79ec<br> Signed-off-by: Evan Quan <<a href="mailto:evan.quan@amd.com">evan.quan@amd.com</a>><br> ---<br> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 47 ++++++++++++++++------<br> 1 file changed, 35 insertions(+), 12 deletions(-)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br> index e6ce949670e5..2d72d206cead 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<br> @@ -2090,6 +2090,7 @@ static int amdgpu_device_enable_mgpu_fan_boost(void)<br> */<br> static int amdgpu_device_ip_late_init(struct amdgpu_device *adev) {<br> + struct amdgpu_gpu_instance *gpu_instance;<br> int i = 0, r;<br> <br> for (i = 0; i < adev->num_ip_blocks; i++) { @@ -2115,6 +2116,40 @@ static int amdgpu_device_ip_late_init(struct amdgpu_device *adev)<br> if (r)<br> DRM_ERROR("enable mgpu fan boost failed (%d).\n", r);<br> <br> +<br> + if (adev->gmc.xgmi.num_physical_nodes > 1) {<br> + mutex_lock(&mgpu_info.mutex);<br> +<br> + /*<br> + * Reset device p-state to low as this was booted with high.<br> + *<br> + * This should be performed only after all devices from the same<br> + * hive get initialized.<br> + *<br> + * However, it's unknown how many device in the hive in advance.<br> + * As this is counted one by one during devices initializations.<br> + *<br> + * So, we wait for all XGMI interlinked devices initialized.<br> + * This may bring some delays as those devices may come from<br> + * different hives. But that should be OK.<br> + */<br> + if (mgpu_info.num_dgpu == adev->gmc.xgmi.num_physical_nodes) {<br> [JK] This condition will never succeed. mgpu_info.num_dgpu is 0-indexed while num_physical_nodes give total nodes.<br> <br> + for (i = 0; i < mgpu_info.num_gpu; i++) {<br> + gpu_instance = &(mgpu_info.gpu_ins[i]);<br> + if (gpu_instance->adev->flags & AMD_IS_APU)<br> + continue;<br> +<br> + r = amdgpu_xgmi_set_pstate(gpu_instance->adev, 0);<br> + if (r) {<br> + DRM_ERROR("pstate setting failed (%d).\n", r);<br> + break;<br> + }<br> + }<br> + }<br> +<br> + mutex_unlock(&mgpu_info.mutex);<br> + }<br> +<br> return 0;<br> }<br> <br> @@ -2227,18 +2262,6 @@ static void amdgpu_device_delayed_init_work_handler(struct work_struct *work)<br> r = amdgpu_ib_ring_tests(adev);<br> if (r)<br> DRM_ERROR("ib ring test failed (%d).\n", r);<br> -<br> - /*<br> - * set to low pstate by default<br> - * This should be performed after all devices from<br> - * XGMI finish their initializations. Thus it's moved<br> - * to here.<br> - * The time delay is 2S. TODO: confirm whether that<br> - * is enough for all possible XGMI setups.<br> - */<br> - r = amdgpu_xgmi_set_pstate(adev, 0);<br> - if (r)<br> - DRM_ERROR("pstate setting failed (%d).\n", r);<br> }<br> <br> static void amdgpu_device_delay_enable_gfx_off(struct work_struct *work)<br> --<br> 2.23.0<o:p></o:p></p> </div> </div> </div> </body> </html>