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Hi Felix,</div>
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<br>
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That's because v8 and v7 share the same <span style="font-family: "Segoe UI", "Segoe UI Web (West European)", "Segoe UI", -apple-system, BlinkMacSystemFont, Roboto, "Helvetica Neue", sans-serif; font-size: 14.6667px; background-color: rgb(255, 255, 255); display: inline !important">
packet_manager_funcs. In this case, it is better to keep it as it is.</span></div>
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<span style="font-family: "Segoe UI", "Segoe UI Web (West European)", "Segoe UI", -apple-system, BlinkMacSystemFont, Roboto, "Helvetica Neue", sans-serif; font-size: 14.6667px; background-color: rgb(255, 255, 255); display: inline !important">Yong</span></div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Kuehling, Felix <Felix.Kuehling@amd.com><br>
<b>Sent:</b> Wednesday, November 6, 2019 11:45 PM<br>
<b>To:</b> Zhao, Yong <Yong.Zhao@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> Re: [PATCH 2/3] drm/amdkfd: only keep release_mem function for Hawaii</font>
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<div class="PlainText">On 2019-10-30 20:17, Zhao, Yong wrote:<br>
> release_mem won't be used at all on GFX9 and GFX10, so delete it.<br>
<br>
Hawaii was GFXv7. So we're not using the release_mem packet on GFXv8 <br>
either. Why arbitrarily limit this change to GFXv9 and 10?<br>
<br>
Regards,<br>
   Felix<br>
<br>
><br>
> Change-Id: I13787a8a29b83e7516c582a7401f2e14721edf5f<br>
> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com><br>
> ---<br>
>   .../gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c | 35 ++-----------------<br>
>   .../gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c  | 33 ++---------------<br>
>   2 files changed, 4 insertions(+), 64 deletions(-)<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c<br>
> index aed32ab7102e..bfd6221acae9 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c<br>
> @@ -298,37 +298,6 @@ static int pm_query_status_v10(struct packet_manager *pm, uint32_t *buffer,<br>
>        return 0;<br>
>   }<br>
>   <br>
> -<br>
> -static int pm_release_mem_v10(uint64_t gpu_addr, uint32_t *buffer)<br>
> -{<br>
> -     struct pm4_mec_release_mem *packet;<br>
> -<br>
> -     WARN_ON(!buffer);<br>
> -<br>
> -     packet = (struct pm4_mec_release_mem *)buffer;<br>
> -     memset(buffer, 0, sizeof(struct pm4_mec_release_mem));<br>
> -<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_RELEASE_MEM,<br>
> -                                     sizeof(struct pm4_mec_release_mem));<br>
> -<br>
> -     packet->bitfields2.event_type = CACHE_FLUSH_AND_INV_TS_EVENT;<br>
> -     packet->bitfields2.event_index = event_index__mec_release_mem__end_of_pipe;<br>
> -     packet->bitfields2.tcl1_action_ena = 1;<br>
> -     packet->bitfields2.tc_action_ena = 1;<br>
> -     packet->bitfields2.cache_policy = cache_policy__mec_release_mem__lru;<br>
> -<br>
> -     packet->bitfields3.data_sel = data_sel__mec_release_mem__send_32_bit_low;<br>
> -     packet->bitfields3.int_sel =<br>
> -             int_sel__mec_release_mem__send_interrupt_after_write_confirm;<br>
> -<br>
> -     packet->bitfields4.address_lo_32b = (gpu_addr & 0xffffffff) >> 2;<br>
> -     packet->address_hi = upper_32_bits(gpu_addr);<br>
> -<br>
> -     packet->data_lo = 0;<br>
> -<br>
> -     return sizeof(struct pm4_mec_release_mem) / sizeof(unsigned int);<br>
> -}<br>
> -<br>
>   const struct packet_manager_funcs kfd_v10_pm_funcs = {<br>
>        .map_process                    = pm_map_process_v10,<br>
>        .runlist                        = pm_runlist_v10,<br>
> @@ -336,13 +305,13 @@ const struct packet_manager_funcs kfd_v10_pm_funcs = {<br>
>        .map_queues                     = pm_map_queues_v10,<br>
>        .unmap_queues                   = pm_unmap_queues_v10,<br>
>        .query_status                   = pm_query_status_v10,<br>
> -     .release_mem                    = pm_release_mem_v10,<br>
> +     .release_mem                    = NULL,<br>
>        .map_process_size               = sizeof(struct pm4_mes_map_process),<br>
>        .runlist_size                   = sizeof(struct pm4_mes_runlist),<br>
>        .set_resources_size             = sizeof(struct pm4_mes_set_resources),<br>
>        .map_queues_size                = sizeof(struct pm4_mes_map_queues),<br>
>        .unmap_queues_size              = sizeof(struct pm4_mes_unmap_queues),<br>
>        .query_status_size              = sizeof(struct pm4_mes_query_status),<br>
> -     .release_mem_size               = sizeof(struct pm4_mec_release_mem)<br>
> +     .release_mem_size               = 0,<br>
>   };<br>
>   <br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c<br>
> index 3b5ca2b1d7a6..f0e4910a8865 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c<br>
> @@ -336,35 +336,6 @@ static int pm_query_status_v9(struct packet_manager *pm, uint32_t *buffer,<br>
>        return 0;<br>
>   }<br>
>   <br>
> -<br>
> -static int pm_release_mem_v9(uint64_t gpu_addr, uint32_t *buffer)<br>
> -{<br>
> -     struct pm4_mec_release_mem *packet;<br>
> -<br>
> -     packet = (struct pm4_mec_release_mem *)buffer;<br>
> -     memset(buffer, 0, sizeof(struct pm4_mec_release_mem));<br>
> -<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_RELEASE_MEM,<br>
> -                                     sizeof(struct pm4_mec_release_mem));<br>
> -<br>
> -     packet->bitfields2.event_type = CACHE_FLUSH_AND_INV_TS_EVENT;<br>
> -     packet->bitfields2.event_index = event_index__mec_release_mem__end_of_pipe;<br>
> -     packet->bitfields2.tcl1_action_ena = 1;<br>
> -     packet->bitfields2.tc_action_ena = 1;<br>
> -     packet->bitfields2.cache_policy = cache_policy__mec_release_mem__lru;<br>
> -<br>
> -     packet->bitfields3.data_sel = data_sel__mec_release_mem__send_32_bit_low;<br>
> -     packet->bitfields3.int_sel =<br>
> -             int_sel__mec_release_mem__send_interrupt_after_write_confirm;<br>
> -<br>
> -     packet->bitfields4.address_lo_32b = (gpu_addr & 0xffffffff) >> 2;<br>
> -     packet->address_hi = upper_32_bits(gpu_addr);<br>
> -<br>
> -     packet->data_lo = 0;<br>
> -<br>
> -     return 0;<br>
> -}<br>
> -<br>
>   const struct packet_manager_funcs kfd_v9_pm_funcs = {<br>
>        .map_process            = pm_map_process_v9,<br>
>        .runlist                = pm_runlist_v9,<br>
> @@ -372,12 +343,12 @@ const struct packet_manager_funcs kfd_v9_pm_funcs = {<br>
>        .map_queues             = pm_map_queues_v9,<br>
>        .unmap_queues           = pm_unmap_queues_v9,<br>
>        .query_status           = pm_query_status_v9,<br>
> -     .release_mem            = pm_release_mem_v9,<br>
> +     .release_mem            = NULL,<br>
>        .map_process_size       = sizeof(struct pm4_mes_map_process),<br>
>        .runlist_size           = sizeof(struct pm4_mes_runlist),<br>
>        .set_resources_size     = sizeof(struct pm4_mes_set_resources),<br>
>        .map_queues_size        = sizeof(struct pm4_mes_map_queues),<br>
>        .unmap_queues_size      = sizeof(struct pm4_mes_unmap_queues),<br>
>        .query_status_size      = sizeof(struct pm4_mes_query_status),<br>
> -     .release_mem_size       = sizeof(struct pm4_mec_release_mem)<br>
> +     .release_mem_size       = 0,<br>
>   };<br>
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