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Okay. I submitted a PSDB. Meanwhile, I got the answer from FW and SQ HW contact that nothing bad will happen on GFX9 by writing 1 to <span style="color: rgb(32, 31, 30); font-family: "Segoe UI", "Segoe UI Web (West European)", "Segoe UI", -apple-system, BlinkMacSystemFont, Roboto, "Helvetica Neue", sans-serif; font-size: 14.6667px; background-color: rgb(255, 255, 255); display: inline !important">TRAP_EN.</span></div>
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<span style="color: rgb(32, 31, 30); font-family: "Segoe UI", "Segoe UI Web (West European)", "Segoe UI", -apple-system, BlinkMacSystemFont, Roboto, "Helvetica Neue", sans-serif; font-size: 14.6667px; background-color: rgb(255, 255, 255); display: inline !important">Yong</span></div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Kuehling, Felix <Felix.Kuehling@amd.com><br>
<b>Sent:</b> Thursday, November 7, 2019 4:07 PM<br>
<b>To:</b> Zhao, Yong <Yong.Zhao@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> Re: [PATCH] drm/amdkfd: Use kernel queue v9 functions for v10 (ver2)</font>
<div> </div>
</div>
<div class="BodyFragment"><font size="2"><span style="font-size:11pt;">
<div class="PlainText">Are you sure that setting the SQ_SHADER_TBA_HI__TRAP_EN bit on GFXv9 is
<br>
completely harmless? If the field is not defined, maybe setting the bit <br>
makes the address invalid. It's probably worth running that through a <br>
PSDB, which would cover Vega10, Vega20 and Arcturus.<br>
<br>
If it actually works, the patch is<br>
<br>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com><br>
<br>
Regards,<br>
   Felix<br>
<br>
On 2019-11-07 15:34, Zhao, Yong wrote:<br>
> The kernel queue functions for v9 and v10 are the same except<br>
> pm_map_process_v* which have small difference, so they should be reused.<br>
> This eliminates the need of reapplying several patches which were<br>
> applied on v9 but not on v10, such as bigger GWS and more than 2<br>
> SDMA engine support which were introduced on Arcturus.<br>
><br>
> Change-Id: I2d385961e3c884db14e30b5afc98d0d9e4cb1802<br>
> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com><br>
> ---<br>
>   drivers/gpu/drm/amd/amdkfd/Makefile           |   1 -<br>
>   drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c |   4 +-<br>
>   drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.h |   1 -<br>
>   .../gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c | 317 ------------------<br>
>   .../gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c  |  16 +-<br>
>   .../gpu/drm/amd/amdkfd/kfd_packet_manager.c   |   4 +-<br>
>   drivers/gpu/drm/amd/amdkfd/kfd_priv.h         |   4 -<br>
>   7 files changed, 14 insertions(+), 333 deletions(-)<br>
>   delete mode 100644 drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c<br>
><br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/Makefile b/drivers/gpu/drm/amd/amdkfd/Makefile<br>
> index 48155060a57c..017a8b7156da 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/Makefile<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/Makefile<br>
> @@ -41,7 +41,6 @@ AMDKFD_FILES        := $(AMDKFD_PATH)/kfd_module.o \<br>
>                $(AMDKFD_PATH)/kfd_kernel_queue_cik.o \<br>
>                $(AMDKFD_PATH)/kfd_kernel_queue_vi.o \<br>
>                $(AMDKFD_PATH)/kfd_kernel_queue_v9.o \<br>
> -             $(AMDKFD_PATH)/kfd_kernel_queue_v10.o \<br>
>                $(AMDKFD_PATH)/kfd_packet_manager.o \<br>
>                $(AMDKFD_PATH)/kfd_process_queue_manager.o \<br>
>                $(AMDKFD_PATH)/kfd_device_queue_manager.o \<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c<br>
> index 11d244891393..0d966408ea87 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c<br>
> @@ -332,12 +332,10 @@ struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,<br>
>        case CHIP_RAVEN:<br>
>        case CHIP_RENOIR:<br>
>        case CHIP_ARCTURUS:<br>
> -             kernel_queue_init_v9(&kq->ops_asic_specific);<br>
> -             break;<br>
>        case CHIP_NAVI10:<br>
>        case CHIP_NAVI12:<br>
>        case CHIP_NAVI14:<br>
> -             kernel_queue_init_v10(&kq->ops_asic_specific);<br>
> +             kernel_queue_init_v9(&kq->ops_asic_specific);<br>
>                break;<br>
>        default:<br>
>                WARN(1, "Unexpected ASIC family %u",<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.h b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.h<br>
> index 365fc674fea4..a7116a939029 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.h<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.h<br>
> @@ -102,6 +102,5 @@ struct kernel_queue {<br>
>   void kernel_queue_init_cik(struct kernel_queue_ops *ops);<br>
>   void kernel_queue_init_vi(struct kernel_queue_ops *ops);<br>
>   void kernel_queue_init_v9(struct kernel_queue_ops *ops);<br>
> -void kernel_queue_init_v10(struct kernel_queue_ops *ops);<br>
>   <br>
>   #endif /* KFD_KERNEL_QUEUE_H_ */<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c<br>
> deleted file mode 100644<br>
> index bfd6221acae9..000000000000<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v10.c<br>
> +++ /dev/null<br>
> @@ -1,317 +0,0 @@<br>
> -/*<br>
> - * Copyright 2018 Advanced Micro Devices, Inc.<br>
> - *<br>
> - * Permission is hereby granted, free of charge, to any person obtaining a<br>
> - * copy of this software and associated documentation files (the "Software"),<br>
> - * to deal in the Software without restriction, including without limitation<br>
> - * the rights to use, copy, modify, merge, publish, distribute, sublicense,<br>
> - * and/or sell copies of the Software, and to permit persons to whom the<br>
> - * Software is furnished to do so, subject to the following conditions:<br>
> - *<br>
> - * The above copyright notice and this permission notice shall be included in<br>
> - * all copies or substantial portions of the Software.<br>
> - *<br>
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR<br>
> - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,<br>
> - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL<br>
> - * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR<br>
> - * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,<br>
> - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR<br>
> - * OTHER DEALINGS IN THE SOFTWARE.<br>
> - *<br>
> - */<br>
> -<br>
> -#include "kfd_kernel_queue.h"<br>
> -#include "kfd_device_queue_manager.h"<br>
> -#include "kfd_pm4_headers_ai.h"<br>
> -#include "kfd_pm4_opcodes.h"<br>
> -#include "gc/gc_10_1_0_sh_mask.h"<br>
> -<br>
> -static bool initialize_v10(struct kernel_queue *kq, struct kfd_dev *dev,<br>
> -                     enum kfd_queue_type type, unsigned int queue_size);<br>
> -static void uninitialize_v10(struct kernel_queue *kq);<br>
> -static void submit_packet_v10(struct kernel_queue *kq);<br>
> -<br>
> -void kernel_queue_init_v10(struct kernel_queue_ops *ops)<br>
> -{<br>
> -     ops->initialize = initialize_v10;<br>
> -     ops->uninitialize = uninitialize_v10;<br>
> -     ops->submit_packet = submit_packet_v10;<br>
> -}<br>
> -<br>
> -static bool initialize_v10(struct kernel_queue *kq, struct kfd_dev *dev,<br>
> -                     enum kfd_queue_type type, unsigned int queue_size)<br>
> -{<br>
> -     int retval;<br>
> -<br>
> -     retval = kfd_gtt_sa_allocate(dev, PAGE_SIZE, &kq->eop_mem);<br>
> -     if (retval != 0)<br>
> -             return false;<br>
> -<br>
> -     kq->eop_gpu_addr = kq->eop_mem->gpu_addr;<br>
> -     kq->eop_kernel_addr = kq->eop_mem->cpu_ptr;<br>
> -<br>
> -     memset(kq->eop_kernel_addr, 0, PAGE_SIZE);<br>
> -<br>
> -     return true;<br>
> -}<br>
> -<br>
> -static void uninitialize_v10(struct kernel_queue *kq)<br>
> -{<br>
> -     kfd_gtt_sa_free(kq->dev, kq->eop_mem);<br>
> -}<br>
> -<br>
> -static void submit_packet_v10(struct kernel_queue *kq)<br>
> -{<br>
> -     *kq->wptr64_kernel = kq->pending_wptr64;<br>
> -     write_kernel_doorbell64(kq->queue->properties.doorbell_ptr,<br>
> -                             kq->pending_wptr64);<br>
> -}<br>
> -<br>
> -static int pm_map_process_v10(struct packet_manager *pm,<br>
> -             uint32_t *buffer, struct qcm_process_device *qpd)<br>
> -{<br>
> -     struct pm4_mes_map_process *packet;<br>
> -     uint64_t vm_page_table_base_addr = qpd->page_table_base;<br>
> -<br>
> -     packet = (struct pm4_mes_map_process *)buffer;<br>
> -     memset(buffer, 0, sizeof(struct pm4_mes_map_process));<br>
> -<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_MAP_PROCESS,<br>
> -                                     sizeof(struct pm4_mes_map_process));<br>
> -     packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;<br>
> -     packet->bitfields2.process_quantum = 1;<br>
> -     packet->bitfields2.pasid = qpd->pqm->process->pasid;<br>
> -     packet->bitfields14.gds_size = qpd->gds_size;<br>
> -     packet->bitfields14.num_gws = qpd->num_gws;<br>
> -     packet->bitfields14.num_oac = qpd->num_oac;<br>
> -     packet->bitfields14.sdma_enable = 1;<br>
> -<br>
> -     packet->bitfields14.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count;<br>
> -<br>
> -     packet->sh_mem_config = qpd->sh_mem_config;<br>
> -     packet->sh_mem_bases = qpd->sh_mem_bases;<br>
> -     if (qpd->tba_addr) {<br>
> -             packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8);<br>
> -             packet->sq_shader_tba_hi = (1 << SQ_SHADER_TBA_HI__TRAP_EN__SHIFT) |<br>
> -                     upper_32_bits(qpd->tba_addr >> 8);<br>
> -             packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8);<br>
> -             packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8);<br>
> -     }<br>
> -<br>
> -     packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);<br>
> -     packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);<br>
> -<br>
> -     packet->vm_context_page_table_base_addr_lo32 =<br>
> -                     lower_32_bits(vm_page_table_base_addr);<br>
> -     packet->vm_context_page_table_base_addr_hi32 =<br>
> -                     upper_32_bits(vm_page_table_base_addr);<br>
> -<br>
> -     return 0;<br>
> -}<br>
> -<br>
> -static int pm_runlist_v10(struct packet_manager *pm, uint32_t *buffer,<br>
> -                     uint64_t ib, size_t ib_size_in_dwords, bool chain)<br>
> -{<br>
> -     struct pm4_mes_runlist *packet;<br>
> -<br>
> -     int concurrent_proc_cnt = 0;<br>
> -     struct kfd_dev *kfd = pm->dqm->dev;<br>
> -<br>
> -     /* Determine the number of processes to map together to HW:<br>
> -      * it can not exceed the number of VMIDs available to the<br>
> -      * scheduler, and it is determined by the smaller of the number<br>
> -      * of processes in the runlist and kfd module parameter<br>
> -      * hws_max_conc_proc.<br>
> -      * Note: the arbitration between the number of VMIDs and<br>
> -      * hws_max_conc_proc has been done in<br>
> -      * kgd2kfd_device_init().<br>
> -      */<br>
> -     concurrent_proc_cnt = min(pm->dqm->processes_count,<br>
> -                     kfd->max_proc_per_quantum);<br>
> -<br>
> -<br>
> -     packet = (struct pm4_mes_runlist *)buffer;<br>
> -<br>
> -     memset(buffer, 0, sizeof(struct pm4_mes_runlist));<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_RUN_LIST,<br>
> -                                             sizeof(struct pm4_mes_runlist));<br>
> -<br>
> -     packet->bitfields4.ib_size = ib_size_in_dwords;<br>
> -     packet->bitfields4.chain = chain ? 1 : 0;<br>
> -     packet->bitfields4.offload_polling = 0;<br>
> -     packet->bitfields4.valid = 1;<br>
> -     packet->bitfields4.process_cnt = concurrent_proc_cnt;<br>
> -     packet->ordinal2 = lower_32_bits(ib);<br>
> -     packet->ib_base_hi = upper_32_bits(ib);<br>
> -<br>
> -     return 0;<br>
> -}<br>
> -<br>
> -static int pm_map_queues_v10(struct packet_manager *pm, uint32_t *buffer,<br>
> -             struct queue *q, bool is_static)<br>
> -{<br>
> -     struct pm4_mes_map_queues *packet;<br>
> -     bool use_static = is_static;<br>
> -<br>
> -     packet = (struct pm4_mes_map_queues *)buffer;<br>
> -     memset(buffer, 0, sizeof(struct pm4_mes_map_queues));<br>
> -<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_MAP_QUEUES,<br>
> -                                     sizeof(struct pm4_mes_map_queues));<br>
> -     packet->bitfields2.num_queues = 1;<br>
> -     packet->bitfields2.queue_sel =<br>
> -             queue_sel__mes_map_queues__map_to_hws_determined_queue_slots_vi;<br>
> -<br>
> -     packet->bitfields2.engine_sel =<br>
> -             engine_sel__mes_map_queues__compute_vi;<br>
> -     packet->bitfields2.queue_type =<br>
> -             queue_type__mes_map_queues__normal_compute_vi;<br>
> -<br>
> -     switch (q->properties.type) {<br>
> -     case KFD_QUEUE_TYPE_COMPUTE:<br>
> -             if (use_static)<br>
> -                     packet->bitfields2.queue_type =<br>
> -             queue_type__mes_map_queues__normal_latency_static_queue_vi;<br>
> -             break;<br>
> -     case KFD_QUEUE_TYPE_DIQ:<br>
> -             packet->bitfields2.queue_type =<br>
> -                     queue_type__mes_map_queues__debug_interface_queue_vi;<br>
> -             break;<br>
> -     case KFD_QUEUE_TYPE_SDMA:<br>
> -     case KFD_QUEUE_TYPE_SDMA_XGMI:<br>
> -             packet->bitfields2.engine_sel = q->properties.sdma_engine_id +<br>
> -                             engine_sel__mes_map_queues__sdma0_vi;<br>
> -             use_static = false; /* no static queues under SDMA */<br>
> -             break;<br>
> -     default:<br>
> -             WARN(1, "queue type %d\n", q->properties.type);<br>
> -             return -EINVAL;<br>
> -     }<br>
> -     packet->bitfields3.doorbell_offset =<br>
> -                     q->properties.doorbell_off;<br>
> -<br>
> -     packet->mqd_addr_lo =<br>
> -                     lower_32_bits(q->gart_mqd_addr);<br>
> -<br>
> -     packet->mqd_addr_hi =<br>
> -                     upper_32_bits(q->gart_mqd_addr);<br>
> -<br>
> -     packet->wptr_addr_lo =<br>
> -                     lower_32_bits((uint64_t)q->properties.write_ptr);<br>
> -<br>
> -     packet->wptr_addr_hi =<br>
> -                     upper_32_bits((uint64_t)q->properties.write_ptr);<br>
> -<br>
> -     return 0;<br>
> -}<br>
> -<br>
> -static int pm_unmap_queues_v10(struct packet_manager *pm, uint32_t *buffer,<br>
> -                     enum kfd_queue_type type,<br>
> -                     enum kfd_unmap_queues_filter filter,<br>
> -                     uint32_t filter_param, bool reset,<br>
> -                     unsigned int sdma_engine)<br>
> -{<br>
> -     struct pm4_mes_unmap_queues *packet;<br>
> -<br>
> -     packet = (struct pm4_mes_unmap_queues *)buffer;<br>
> -     memset(buffer, 0, sizeof(struct pm4_mes_unmap_queues));<br>
> -<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_UNMAP_QUEUES,<br>
> -                                     sizeof(struct pm4_mes_unmap_queues));<br>
> -     switch (type) {<br>
> -     case KFD_QUEUE_TYPE_COMPUTE:<br>
> -     case KFD_QUEUE_TYPE_DIQ:<br>
> -             packet->bitfields2.engine_sel =<br>
> -                     engine_sel__mes_unmap_queues__compute;<br>
> -             break;<br>
> -     case KFD_QUEUE_TYPE_SDMA:<br>
> -     case KFD_QUEUE_TYPE_SDMA_XGMI:<br>
> -             packet->bitfields2.engine_sel =<br>
> -                     engine_sel__mes_unmap_queues__sdma0 + sdma_engine;<br>
> -             break;<br>
> -     default:<br>
> -             WARN(1, "queue type %d\n", type);<br>
> -             break;<br>
> -     }<br>
> -<br>
> -     if (reset)<br>
> -             packet->bitfields2.action =<br>
> -                     action__mes_unmap_queues__reset_queues;<br>
> -     else<br>
> -             packet->bitfields2.action =<br>
> -                     action__mes_unmap_queues__preempt_queues;<br>
> -<br>
> -     switch (filter) {<br>
> -     case KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE:<br>
> -             packet->bitfields2.queue_sel =<br>
> -                     queue_sel__mes_unmap_queues__perform_request_on_specified_queues;<br>
> -             packet->bitfields2.num_queues = 1;<br>
> -             packet->bitfields3b.doorbell_offset0 = filter_param;<br>
> -             break;<br>
> -     case KFD_UNMAP_QUEUES_FILTER_BY_PASID:<br>
> -             packet->bitfields2.queue_sel =<br>
> -                     queue_sel__mes_unmap_queues__perform_request_on_pasid_queues;<br>
> -             packet->bitfields3a.pasid = filter_param;<br>
> -             break;<br>
> -     case KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES:<br>
> -             packet->bitfields2.queue_sel =<br>
> -                     queue_sel__mes_unmap_queues__unmap_all_queues;<br>
> -             break;<br>
> -     case KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES:<br>
> -             /* in this case, we do not preempt static queues */<br>
> -             packet->bitfields2.queue_sel =<br>
> -                     queue_sel__mes_unmap_queues__unmap_all_non_static_queues;<br>
> -             break;<br>
> -     default:<br>
> -             WARN(1, "filter %d\n", filter);<br>
> -             break;<br>
> -     }<br>
> -<br>
> -     return 0;<br>
> -<br>
> -}<br>
> -<br>
> -static int pm_query_status_v10(struct packet_manager *pm, uint32_t *buffer,<br>
> -                     uint64_t fence_address, uint32_t fence_value)<br>
> -{<br>
> -     struct pm4_mes_query_status *packet;<br>
> -<br>
> -     packet = (struct pm4_mes_query_status *)buffer;<br>
> -     memset(buffer, 0, sizeof(struct pm4_mes_query_status));<br>
> -<br>
> -<br>
> -     packet->header.u32All = pm_build_pm4_header(IT_QUERY_STATUS,<br>
> -                                     sizeof(struct pm4_mes_query_status));<br>
> -<br>
> -     packet->bitfields2.context_id = 0;<br>
> -     packet->bitfields2.interrupt_sel =<br>
> -                     interrupt_sel__mes_query_status__completion_status;<br>
> -     packet->bitfields2.command =<br>
> -                     command__mes_query_status__fence_only_after_write_ack;<br>
> -<br>
> -     packet->addr_hi = upper_32_bits((uint64_t)fence_address);<br>
> -     packet->addr_lo = lower_32_bits((uint64_t)fence_address);<br>
> -     packet->data_hi = upper_32_bits((uint64_t)fence_value);<br>
> -     packet->data_lo = lower_32_bits((uint64_t)fence_value);<br>
> -<br>
> -     return 0;<br>
> -}<br>
> -<br>
> -const struct packet_manager_funcs kfd_v10_pm_funcs = {<br>
> -     .map_process                    = pm_map_process_v10,<br>
> -     .runlist                        = pm_runlist_v10,<br>
> -     .set_resources                  = pm_set_resources_vi,<br>
> -     .map_queues                     = pm_map_queues_v10,<br>
> -     .unmap_queues                   = pm_unmap_queues_v10,<br>
> -     .query_status                   = pm_query_status_v10,<br>
> -     .release_mem                    = NULL,<br>
> -     .map_process_size               = sizeof(struct pm4_mes_map_process),<br>
> -     .runlist_size                   = sizeof(struct pm4_mes_runlist),<br>
> -     .set_resources_size             = sizeof(struct pm4_mes_set_resources),<br>
> -     .map_queues_size                = sizeof(struct pm4_mes_map_queues),<br>
> -     .unmap_queues_size              = sizeof(struct pm4_mes_unmap_queues),<br>
> -     .query_status_size              = sizeof(struct pm4_mes_query_status),<br>
> -     .release_mem_size               = 0,<br>
> -};<br>
> -<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c<br>
> index f0e4910a8865..9e0eaf446bab 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue_v9.c<br>
> @@ -25,6 +25,7 @@<br>
>   #include "kfd_device_queue_manager.h"<br>
>   #include "kfd_pm4_headers_ai.h"<br>
>   #include "kfd_pm4_opcodes.h"<br>
> +#include "gc/gc_10_1_0_sh_mask.h"<br>
>   <br>
>   static bool initialize_v9(struct kernel_queue *kq, struct kfd_dev *dev,<br>
>                        enum kfd_queue_type type, unsigned int queue_size)<br>
> @@ -85,10 +86,17 @@ static int pm_map_process_v9(struct packet_manager *pm,<br>
>   <br>
>        packet->sh_mem_config = qpd->sh_mem_config;<br>
>        packet->sh_mem_bases = qpd->sh_mem_bases;<br>
> -     packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8);<br>
> -     packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8);<br>
> -     packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8);<br>
> -     packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8);<br>
> +     if (qpd->tba_addr) {<br>
> +             packet->sq_shader_tba_lo = lower_32_bits(qpd->tba_addr >> 8);<br>
> +             /* On GFX9, unlike GFX10, bit TRAP_EN of SQ_SHADER_TBA_HI is<br>
> +              * not defined, so setting it won't do any harm.<br>
> +              */<br>
> +             packet->sq_shader_tba_hi = upper_32_bits(qpd->tba_addr >> 8)<br>
> +                             | 1 << SQ_SHADER_TBA_HI__TRAP_EN__SHIFT;<br>
> +<br>
> +             packet->sq_shader_tma_lo = lower_32_bits(qpd->tma_addr >> 8);<br>
> +             packet->sq_shader_tma_hi = upper_32_bits(qpd->tma_addr >> 8);<br>
> +     }<br>
>   <br>
>        packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);<br>
>        packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c<br>
> index 83ef4b3dd2fb..700be4f80867 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_packet_manager.c<br>
> @@ -241,12 +241,10 @@ int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)<br>
>        case CHIP_RAVEN:<br>
>        case CHIP_RENOIR:<br>
>        case CHIP_ARCTURUS:<br>
> -             pm->pmf = &kfd_v9_pm_funcs;<br>
> -             break;<br>
>        case CHIP_NAVI10:<br>
>        case CHIP_NAVI12:<br>
>        case CHIP_NAVI14:<br>
> -             pm->pmf = &kfd_v10_pm_funcs;<br>
> +             pm->pmf = &kfd_v9_pm_funcs;<br>
>                break;<br>
>        default:<br>
>                WARN(1, "Unexpected ASIC family %u",<br>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h<br>
> index 62db4d20ed32..f2078bfb8ae1 100644<br>
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_priv.h<br>
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_priv.h<br>
> @@ -977,7 +977,6 @@ struct packet_manager_funcs {<br>
>   <br>
>   extern const struct packet_manager_funcs kfd_vi_pm_funcs;<br>
>   extern const struct packet_manager_funcs kfd_v9_pm_funcs;<br>
> -extern const struct packet_manager_funcs kfd_v10_pm_funcs;<br>
>   <br>
>   int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);<br>
>   void pm_uninit(struct packet_manager *pm);<br>
> @@ -996,9 +995,6 @@ void pm_release_ib(struct packet_manager *pm);<br>
>   <br>
>   /* Following PM funcs can be shared among VI and AI */<br>
>   unsigned int pm_build_pm4_header(unsigned int opcode, size_t packet_size);<br>
> -int pm_set_resources_vi(struct packet_manager *pm, uint32_t *buffer,<br>
> -                     struct scheduling_resources *res);<br>
> -<br>
>   <br>
>   uint64_t kfd_get_number_elems(struct kfd_dev *kfd);<br>
>   <br>
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