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Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Xiaojie Yuan <xiaojie.yuan@amd.com><br>
<b>Sent:</b> Thursday, November 14, 2019 4:13 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Long, Gang <Gang.Long@amd.com>; Xiao, Jack <Jack.Xiao@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu/gfx10: explicitly wait for cp idle after halt/unhalt</font>
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<div class="PlainText">50us is not enough to wait for cp ready after gpu reset on some navi asics.<br>
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Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com><br>
Suggested-by: Jack Xiao <Jack.Xiao@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 12 +++++++++++-<br>
1 file changed, 11 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
index 86db40717d38..7d40c73a5ab7 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c<br>
@@ -2371,7 +2371,17 @@ static void gfx_v10_0_cp_gfx_enable(struct amdgpu_device *adev, bool enable)<br>
adev->gfx.gfx_ring[i].sched.ready = false;<br>
}<br>
WREG32_SOC15(GC, 0, mmCP_ME_CNTL, tmp);<br>
- udelay(50);<br>
+<br>
+ for (i = 0; i < adev->usec_timeout; i++) {<br>
+ if (RREG32_SOC15(GC, 0, mmCP_STAT) == 0)<br>
+ break;<br>
+ udelay(1);<br>
+ }<br>
+<br>
+ if (i >= adev->usec_timeout)<br>
+ DRM_ERROR("failed to %s cp gfx\n", enable ? "unhalt" : "halt");<br>
+<br>
+ return 0;<br>
}<br>
<br>
static int gfx_v10_0_cp_gfx_load_pfp_microcode(struct amdgpu_device *adev)<br>
-- <br>
2.20.1<br>
<br>
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