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Thanks Alex for this review. </div>
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Both of the two patches will not influence bare-metal code path. </div>
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B. R. </div>
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Jack </div>
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<a href="https://aka.ms/ghei36">Outlook for Android</a></div>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Alex Deucher <alexdeucher@gmail.com><br>
<b>Sent:</b> Thursday, November 21, 2019 11:26:37 PM<br>
<b>To:</b> Zhang, Jack (Jian) <Jack.Zhang1@amd.com><br>
<b>Cc:</b> amd-gfx list <amd-gfx@lists.freedesktop.org><br>
<b>Subject:</b> Re: [PATCH 2/2] drm/amd/amdgpu/sriov skip RLCG s/r list for arcturus VF.</font>
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<div class="PlainText">Nevermind. I missed the sr-iov check. Patch is:<br>
Acked-by: Alex Deucher <alexander.deucher@amd.com><br>
<br>
On Thu, Nov 21, 2019 at 10:25 AM Alex Deucher <alexdeucher@gmail.com> wrote:<br>
><br>
> Won't this impact bare metal hw that needs this?<br>
><br>
> Alex<br>
><br>
> On Thu, Nov 21, 2019 at 1:17 AM Jack Zhang <Jack.Zhang1@amd.com> wrote:<br>
> ><br>
> > After rlcg fw 2.1, kmd driver starts to load extra fw for<br>
> > LIST_CNTL,GPM_MEM,SRM_MEM. We needs to skip the three fw<br>
> > because all rlcg related fw have been loaded by host driver.<br>
> > Guest driver would load the three fw fail without this change.<br>
> ><br>
> > Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com><br>
> > ---<br>
> > drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 5 ++++-<br>
> > 1 file changed, 4 insertions(+), 1 deletion(-)<br>
> ><br>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
> > index c3a42d3..eecde80 100644<br>
> > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
> > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c<br>
> > @@ -1470,7 +1470,10 @@ static int psp_np_fw_load(struct psp_context *psp)<br>
> > || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA5<br>
> > || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA6<br>
> > || ucode->ucode_id == AMDGPU_UCODE_ID_SDMA7<br>
> > - || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G))<br>
> > + || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_G<br>
> > + || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL<br>
> > + || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM<br>
> > + || ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM))<br>
> > /*skip ucode loading in SRIOV VF */<br>
> > continue;<br>
> ><br>
> > --<br>
> > 2.7.4<br>
> ><br>
> > _______________________________________________<br>
> > amd-gfx mailing list<br>
> > amd-gfx@lists.freedesktop.org<br>
> > <a href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7CJack.Zhang1%40amd.com%7C62c30b71b3b8490862d808d76e973ae5%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637099468112639673&sdata=iC932sWNGrLeexp7wIDdrZ7cjVBcFv5giOTC3uHdE%2Fk%3D&reserved=0">
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