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[AMD Official Use Only - Internal Distribution Only]<br>
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Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Yong Zhao <Yong.Zhao@amd.com><br>
<b>Sent:</b> Tuesday, December 3, 2019 10:02 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Zhao, Yong <Yong.Zhao@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdkfd: Contain MMHUB number in mmhub_v9_4_setup_vm_pt_regs()</font>
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<div class="PlainText">Adjust the exposed function prototype so that the caller does not need<br>
to know the MMHUB number.<br>
<br>
Change-Id: I4420d1715984f703954f074682b075fc59e2a330<br>
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com><br>
---<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c |  6 ++----<br>
 drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h             |  8 --------<br>
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c           | 14 ++++++++++++--<br>
 drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h           |  2 ++<br>
 4 files changed, 16 insertions(+), 14 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c<br>
index 47c853ef1051..6f1a4676ddde 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c<br>
@@ -40,7 +40,7 @@<br>
 #include "soc15d.h"<br>
 #include "mmhub_v1_0.h"<br>
 #include "gfxhub_v1_0.h"<br>
-#include "gmc_v9_0.h"<br>
+#include "mmhub_v9_4.h"<br>
 <br>
 <br>
 enum hqd_dequeue_request_type {<br>
@@ -774,9 +774,7 @@ void kgd_gfx_v9_set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmi<br>
          * on GFX8 and older.<br>
          */<br>
         if (adev->asic_type == CHIP_ARCTURUS) {<br>
-               /* Two MMHUBs */<br>
-               mmhub_v9_4_setup_vm_pt_regs(adev, 0, vmid, page_table_base);<br>
-               mmhub_v9_4_setup_vm_pt_regs(adev, 1, vmid, page_table_base);<br>
+               mmhub_v9_4_setup_vm_pt_regs(adev, vmid, page_table_base);<br>
         } else<br>
                 mmhub_v1_0_setup_vm_pt_regs(adev, vmid, page_table_base);<br>
 <br>
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h<br>
index 971c0840358f..49e8be761214 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.h<br>
@@ -36,12 +36,4 @@<br>
 <br>
 extern const struct amd_ip_funcs gmc_v9_0_ip_funcs;<br>
 extern const struct amdgpu_ip_block_version gmc_v9_0_ip_block;<br>
-<br>
-/* amdgpu_amdkfd*.c */<br>
-void gfxhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,<br>
-                               uint64_t value);<br>
-void mmhub_v1_0_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,<br>
-                               uint64_t value);<br>
-void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid,<br>
-                               uint32_t vmid, uint64_t value);<br>
 #endif<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c<br>
index 8599bfdb9a9e..d9301e80522a 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.c<br>
@@ -54,7 +54,7 @@ u64 mmhub_v9_4_get_fb_location(struct amdgpu_device *adev)<br>
         return base;<br>
 }<br>
 <br>
-void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, int hubid,<br>
+static void mmhub_v9_4_setup_hubid_vm_pt_regs(struct amdgpu_device *adev, int hubid,<br>
                                 uint32_t vmid, uint64_t value)<br>
 {<br>
         /* two registers distance between mmVML2VC0_VM_CONTEXT0_* to<br>
@@ -80,7 +80,7 @@ static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev,<br>
 {<br>
         uint64_t pt_base = amdgpu_gmc_pd_addr(adev->gart.bo);<br>
 <br>
-       mmhub_v9_4_setup_vm_pt_regs(adev, hubid, 0, pt_base);<br>
+       mmhub_v9_4_setup_hubid_vm_pt_regs(adev, hubid, 0, pt_base);<br>
 <br>
         WREG32_SOC15_OFFSET(MMHUB, 0,<br>
                             mmVML2VC0_VM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32,<br>
@@ -101,6 +101,16 @@ static void mmhub_v9_4_init_gart_aperture_regs(struct amdgpu_device *adev,<br>
                             (u32)(adev->gmc.gart_end >> 44));<br>
 }<br>
 <br>
+void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,<br>
+                               uint64_t page_table_base)<br>
+{<br>
+       int i;<br>
+<br>
+       for (i = 0; i < MMHUB_NUM_INSTANCES; i++)<br>
+               mmhub_v9_4_setup_hubid_vm_pt_regs(adev, i, vmid,<br>
+                               page_table_base);<br>
+}<br>
+<br>
 static void mmhub_v9_4_init_system_aperture_regs(struct amdgpu_device *adev,<br>
                                                  int hubid)<br>
 {<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h<br>
index 354a4b7e875b..1b979773776c 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v9_4.h<br>
@@ -34,5 +34,7 @@ void mmhub_v9_4_init(struct amdgpu_device *adev);<br>
 int mmhub_v9_4_set_clockgating(struct amdgpu_device *adev,<br>
                                enum amd_clockgating_state state);<br>
 void mmhub_v9_4_get_clockgating(struct amdgpu_device *adev, u32 *flags);<br>
+void mmhub_v9_4_setup_vm_pt_regs(struct amdgpu_device *adev, uint32_t vmid,<br>
+                               uint64_t page_table_base);<br>
 <br>
 #endif<br>
-- <br>
2.17.1<br>
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