<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=gb2312"> </head> <body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;" class=""> Got it. Thanks. <div class="">Reviewed-by: Kenneth Feng <<a href="mailto:kenneth.feng@amd.com" class="">kenneth.feng@amd.com</a></div> <div class=""> <div style=""> <blockquote type="cite" class=""> <div class="">在 2019年12月4日，下午6:23，Quan, Evan <<a href="mailto:Evan.Quan@amd.com" class="">Evan.Quan@amd.com</a>> 写道：</div> <div class=""> <div class="">The abort operation is added in smu_v11_0_send_msg_with_param. And for smu_v11_0_wait_for_response, yes, it's only code factoring. <blockquote type="cite" class="">-----Original Message----- From: Feng, Kenneth <<a href="mailto:Kenneth.Feng@amd.com" class="">Kenneth.Feng@amd.com</a>> Sent: Wednesday, December 4, 2019 6:14 PM To: Quan, Evan <<a href="mailto:Evan.Quan@amd.com" class="">Evan.Quan@amd.com</a>> Cc: <a href="mailto:amd-gfx@lists.freedesktop.org" class="">amd-gfx@lists.freedesktop.org</a> Subject: Re: [PATCH 2/2] drm/amd/powerplay: pre-check the SMU state before issuing message Hi Evan, The original design is also aborting sending the message because of a ‘break’ there. Your patch is for code factoring? Thanks. <blockquote type="cite" class="">在 2019年12月4日，下午5:53，Evan Quan <<a href="mailto:Evan.Quan@amd.com" class="">Evan.Quan@amd.com</a>> 写 </blockquote> 道： <blockquote type="cite" class=""> [CAUTION: External Email] Abort the message issuing if the SMU was not in the right state. Change-Id: Ida9f911e051f6e78de4f475956c78637e56e6ea3 Signed-off-by: Evan Quan <<a href="mailto:evan.quan@amd.com" class="">evan.quan@amd.com</a>> --- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 16 ++++++++-------- drivers/gpu/drm/amd/powerplay/smu_v12_0.c | 16 ++++++++-------- 2 files changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c index 325ec4864f90..d84c7f5fb01a 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c @@ -68,15 +68,13 @@ static int smu_v11_0_wait_for_response(struct </blockquote> smu_context *smu) <blockquote type="cite" class=""> for (i = 0; i < timeout; i++) { cur_value = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); if ((cur_value & MP1_C2PMSG_90__CONTENT_MASK) != 0) - break; + return cur_value == 0x1 ? 0 : -EIO; + udelay(1); } /* timeout means wrong logic */ - if (i == timeout) - return -ETIME; - - return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? 0 : </blockquote> -EIO; <blockquote type="cite" class="">+ return -ETIME; } int @@ -92,9 +90,11 @@ smu_v11_0_send_msg_with_param(struct </blockquote> smu_context *smu, <blockquote type="cite" class=""> return index; ret = smu_v11_0_wait_for_response(smu); - if (ret) - pr_err("failed send message: %10s (%d) \tparam: 0x%08x </blockquote> response %#x\n", <blockquote type="cite" class="">- smu_get_message_name(smu, msg), index, param, ret); + if (ret) { + pr_err("Msg issuing pre-check failed and " + "SMU may be not in the right state!\n"); + return ret; + } WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c index 7f5f7e12a41e..a638326ba1b7 100644 --- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c +++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c @@ -56,15 +56,13 @@ int smu_v12_0_wait_for_response(struct </blockquote> smu_context *smu) <blockquote type="cite" class=""> for (i = 0; i < adev->usec_timeout; i++) { cur_value = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); if ((cur_value & MP1_C2PMSG_90__CONTENT_MASK) != 0) - break; + return cur_value == 0x1 ? 0 : -EIO; + udelay(1); } /* timeout means wrong logic */ - if (i == adev->usec_timeout) - return -ETIME; - - return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90) == 0x1 ? 0 : </blockquote> -EIO; <blockquote type="cite" class="">+ return -ETIME; } int @@ -80,9 +78,11 @@ smu_v12_0_send_msg_with_param(struct </blockquote> smu_context *smu, <blockquote type="cite" class=""> return index; ret = smu_v12_0_wait_for_response(smu); - if (ret) - pr_err("Failed to send message 0x%x, response 0x%x, param </blockquote> 0x%x\n", <blockquote type="cite" class="">- index, ret, param); + if (ret) { + pr_err("Msg issuing pre-check failed and " + "SMU may be not in the right state!\n"); + return ret; + } WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); -- 2.24.0 _______________________________________________ amd-gfx mailing list <a href="mailto:amd-gfx@lists.freedesktop.org" class="">amd-gfx@lists.freedesktop.org</a> https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flist s.freedesktop.org%2Fmailman%2Flistinfo%2Famd- </blockquote> gfx&data=02%7C01%7CKe <blockquote type="cite" class=""> </blockquote> nneth.Feng%<a href="http://40amd.com" class="">40amd.com</a>%7C1383f2661b584e04edf908d7789feaf5%7C3dd8961 fe488 <blockquote type="cite" class=""> </blockquote> 4e608e11a82d994e183d%7C0%7C0%7C637110500551036438&sdata=QQ RY8dsiT% <blockquote type="cite" class="">2BPio5I%2B%2F3ErqLnYQLxt6hcyXHedU79muTI%3D&reserved=0 </blockquote> </blockquote> </div> </div> </blockquote> </div> </div> </body> </html>