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<p class="msipheadera92e061b" align="Left" style="margin:0"><span style="font-size:10.0pt;font-family:Arial;color:#0078D7">[AMD Official Use Only - Internal Distribution Only]</span></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">Not sure it’s same issue as I observed.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">If you have an XGMI setup, use the latest drm-next and the PMFW I used on my XGMI system(I just sent you the vega20_smc.bin through mail). And then give another attempt.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">About the strict time interval, I remember the XGMI node EnterBaco message will fail when interval is around millisecond.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">Regards,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">Ma Le<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"><o:p> </o:p></span></p>
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<p class="MsoNormal"><b><span style="color:windowtext">From:</span></b><span style="color:windowtext"> Grodzovsky, Andrey <Andrey.Grodzovsky@amd.com>
<br>
<b>Sent:</b> Tuesday, December 10, 2019 6:01 AM<br>
<b>To:</b> Ma, Le <Le.Ma@amd.com>; amd-gfx@lists.freedesktop.org; Zhou1, Tao <Tao.Zhou1@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Li, Dennis <Dennis.Li@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com><br>
<b>Cc:</b> Chen, Guchun <Guchun.Chen@amd.com><br>
<b>Subject:</b> Re: [PATCH 07/10] drm/amdgpu: add concurrent baco reset support for XGMI<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p>I reproduced the issue on my side - i consistently observe amdgpu: [powerplay] Failed to send message 0x58, response 0x0 - Baco exit failure - do you know what is the strict time interval within which all the Baco enter/Exit messages needs to be sent to
all the nodes in the hive ?<o:p></o:p></p>
<p>Andrey<o:p></o:p></p>
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<p class="MsoNormal">On 12/9/19 6:34 AM, Ma, Le wrote:<o:p></o:p></p>
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<p class="msipheadera92e061b" style="margin:0in;margin-bottom:.0001pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:#0078D7">[AMD Official Use Only - Internal Distribution Only]</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">Hi Andrey,</span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"> </span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">I tried your patches on my 2P XGMI platform. The baco can work at most time, and randomly got following error:</span><o:p></o:p></p>
<p class="MsoNormal" style="margin-left:.5in"><span style="font-size:12.0pt;color:windowtext">[ 1701.542298] amdgpu: [powerplay] Failed to send message 0x25, response 0x0</span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"> </span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">This error usually means some sync issue exist for xgmi baco case. Feel free to debug your patches on my XGMI platform.</span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"> </span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">Regards,</span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext">Ma Le</span><o:p></o:p></p>
<p class="MsoNormal"><span style="font-size:12.0pt;color:windowtext"> </span><o:p></o:p></p>
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<p class="MsoNormal"><b><span style="color:windowtext">From:</span></b><span style="color:windowtext"> Grodzovsky, Andrey
</span><a href="mailto:Andrey.Grodzovsky@amd.com"><Andrey.Grodzovsky@amd.com></a><span style="color:windowtext">
<br>
<b>Sent:</b> Saturday, December 7, 2019 5:51 AM<br>
<b>To:</b> Ma, Le </span><a href="mailto:Le.Ma@amd.com"><Le.Ma@amd.com></a><span style="color:windowtext">;
</span><a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><span style="color:windowtext">; Zhou1, Tao
</span><a href="mailto:Tao.Zhou1@amd.com"><Tao.Zhou1@amd.com></a><span style="color:windowtext">; Deucher, Alexander
</span><a href="mailto:Alexander.Deucher@amd.com"><Alexander.Deucher@amd.com></a><span style="color:windowtext">; Li, Dennis
</span><a href="mailto:Dennis.Li@amd.com"><Dennis.Li@amd.com></a><span style="color:windowtext">; Zhang, Hawking
</span><a href="mailto:Hawking.Zhang@amd.com"><Hawking.Zhang@amd.com></a><span style="color:windowtext"><br>
<b>Cc:</b> Chen, Guchun </span><a href="mailto:Guchun.Chen@amd.com"><Guchun.Chen@amd.com></a><span style="color:windowtext"><br>
<b>Subject:</b> Re: [PATCH 07/10] drm/amdgpu: add concurrent baco reset support for XGMI</span><o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
<p>Hey Ma, attached a solution - it's just compiled as I still can't make my XGMI setup work (with bridge connected only one device is visible to the system while the other is not). Please try it on your system if you have a chance.
<o:p></o:p></p>
<p>Andrey<o:p></o:p></p>
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<p class="MsoNormal">On 12/4/19 10:14 PM, Ma, Le wrote:<o:p></o:p></p>
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<p>AFAIK it's enough for even single one node in the hive to to fail the enter the BACO state on time to fail the entire hive reset procedure, no ?<o:p></o:p></p>
<p class="MsoNormal" style="mso-margin-top-alt:auto;mso-margin-bottom-alt:auto"><span style="font-size:12.0pt;color:#203864">[Le]: Yeah, agree that. I’ve been thinking that make all nodes entering baco simultaneously can reduce the possibility of node failure
to enter/exit BACO risk. For example, in an XGMI hive with 8 nodes, the total time interval of 8 nodes enter/exit BACO on 8 CPUs is less than the interval that 8 nodes enter BACO serially and exit BACO serially depending on one CPU with yield capability. This
interval is usually strict for BACO feature itself. Anyway, we need more looping test later on any method we will choose.</span><o:p></o:p></p>
<p>Any way - I see our discussion blocks your entire patch set - I think you can go ahead and commit yours way (I think you got an RB from Hawking) and I will look then and see if I can implement my method and if it works will just revert your patch.<o:p></o:p></p>
<p><span style="font-size:12.0pt;color:#203864">[Le]: OK, fine.</span><o:p></o:p></p>
<p>Andrey<o:p></o:p></p>
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