<html><head>
<meta http-equiv="Content-Type" content="text/html; charset=utf-8">
</head>
<body text="#000000" bgcolor="#FFFFFF">
<p><br>
</p>
<div class="moz-cite-prefix">On 12/11/19 11:05 PM, Ma, Le wrote:<br>
</div>
<blockquote type="cite" cite="mid:MN2PR12MB4285C0500B7E9363A2CF7B89F6550@MN2PR12MB4285.namprd12.prod.outlook.com">
<meta name="Generator" content="Microsoft Word 15 (filtered
medium)">
<style><!--
/* Font Definitions */
@font-face
{font-family:"Cambria Math";
panose-1:2 4 5 3 5 4 6 3 2 4;}
@font-face
{font-family:DengXian;
panose-1:2 1 6 0 3 1 1 1 1 1;}
@font-face
{font-family:Calibri;
panose-1:2 15 5 2 2 2 4 3 2 4;}
@font-face
{font-family:"\@DengXian";
panose-1:2 1 6 0 3 1 1 1 1 1;}
/* Style Definitions */
p.MsoNormal, li.MsoNormal, div.MsoNormal
{margin:0in;
margin-bottom:.0001pt;
font-size:11.0pt;
font-family:"Calibri",sans-serif;}
a:link, span.MsoHyperlink
{mso-style-priority:99;
color:#0563C1;
text-decoration:underline;}
a:visited, span.MsoHyperlinkFollowed
{mso-style-priority:99;
color:#954F72;
text-decoration:underline;}
p.MsoPlainText, li.MsoPlainText, div.MsoPlainText
{mso-style-priority:99;
mso-style-link:"Plain Text Char";
margin:0in;
margin-bottom:.0001pt;
font-size:14.0pt;
font-family:"Calibri",sans-serif;}
p.msonormal0, li.msonormal0, div.msonormal0
{mso-style-name:msonormal;
mso-margin-top-alt:auto;
margin-right:0in;
mso-margin-bottom-alt:auto;
margin-left:0in;
font-size:11.0pt;
font-family:"Calibri",sans-serif;}
span.PlainTextChar
{mso-style-name:"Plain Text Char";
mso-style-priority:99;
mso-style-link:"Plain Text";
font-family:"Calibri",sans-serif;}
p.msipheadera92e061b, li.msipheadera92e061b, div.msipheadera92e061b
{mso-style-name:msipheadera92e061b;
mso-margin-top-alt:auto;
margin-right:0in;
mso-margin-bottom-alt:auto;
margin-left:0in;
font-size:11.0pt;
font-family:"Calibri",sans-serif;}
span.EmailStyle21
{mso-style-type:personal-compose;
font-family:"Arial",sans-serif;
color:#0078D7;}
.MsoChpDefault
{mso-style-type:export-only;
font-size:10.0pt;}
@page WordSection1
{size:8.5in 11.0in;
margin:1.0in 1.0in 1.0in 1.0in;}
div.WordSection1
{page:WordSection1;}
--></style><!--[if gte mso 9]><xml>
<o:shapedefaults v:ext="edit" spidmax="1026" />
</xml><![endif]--><!--[if gte mso 9]><xml>
<o:shapelayout v:ext="edit">
<o:idmap v:ext="edit" data="1" />
</o:shapelayout></xml><![endif]-->
<div class="WordSection1">
<p class="msipheadera92e061b" style="margin:0in;margin-bottom:.0001pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:#0078D7">[AMD
Official Use Only - Internal Distribution Only]</span><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">-----Original Message-----<br>
From: Andrey Grodzovsky <a class="moz-txt-link-rfc2396E" href="mailto:andrey.grodzovsky@amd.com"><andrey.grodzovsky@amd.com></a> <br>
Sent: Thursday, December 12, 2019 4:39 AM<br>
To: <a class="moz-txt-link-abbreviated" href="mailto:dri-devel@lists.freedesktop.org">dri-devel@lists.freedesktop.org</a>;
<a class="moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br>
Cc: Deucher, Alexander <a class="moz-txt-link-rfc2396E" href="mailto:Alexander.Deucher@amd.com"><Alexander.Deucher@amd.com></a>; Ma,
Le <a class="moz-txt-link-rfc2396E" href="mailto:Le.Ma@amd.com"><Le.Ma@amd.com></a>; Zhang, Hawking
<a class="moz-txt-link-rfc2396E" href="mailto:Hawking.Zhang@amd.com"><Hawking.Zhang@amd.com></a>; Quan, Evan
<a class="moz-txt-link-rfc2396E" href="mailto:Evan.Quan@amd.com"><Evan.Quan@amd.com></a>; Grodzovsky, Andrey
<a class="moz-txt-link-rfc2396E" href="mailto:Andrey.Grodzovsky@amd.com"><Andrey.Grodzovsky@amd.com></a><br>
Subject: [RESEND PATCH 4/5] Subject: drm/amdgpu: Redo XGMI
reset synchronization.<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Use task barrier in XGMI hive to
synchronize ASIC resets across devices in XGMI hive.<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Signed-off-by: Andrey Grodzovsky <<a href="mailto:andrey.grodzovsky@amd.com" moz-do-not-send="true"><span style="color:windowtext;text-decoration:none">andrey.grodzovsky@amd.com</span></a>><o:p></o:p></p>
<p class="MsoPlainText">---<o:p></o:p></p>
<p class="MsoPlainText">drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
| 42 +++++++++++++++++++++++++-----<o:p></o:p></p>
<p class="MsoPlainText">1 file changed, 36 insertions(+), 6
deletions(-)<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">diff --git
a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<o:p></o:p></p>
<p class="MsoPlainText">index 1d19edfa..e4089a0 100644<o:p></o:p></p>
<p class="MsoPlainText">---
a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<o:p></o:p></p>
<p class="MsoPlainText">+++
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c<o:p></o:p></p>
<p class="MsoPlainText">@@ -67,6 +67,7 @@<o:p></o:p></p>
<p class="MsoPlainText">#include "amdgpu_tmz.h"<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"> #include <linux/suspend.h><o:p></o:p></p>
<p class="MsoPlainText">+#include <drm/task_barrier.h><o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"> MODULE_FIRMWARE("amdgpu/vega10_gpu_info.bin");<o:p></o:p></p>
<p class="MsoPlainText">MODULE_FIRMWARE("amdgpu/vega12_gpu_info.bin");<o:p></o:p></p>
<p class="MsoPlainText">@@ -2663,14 +2664,43 @@ static void
amdgpu_device_xgmi_reset_func(struct work_struct *__work) {<o:p></o:p></p>
<p class="MsoPlainText"> struct amdgpu_device *adev =<o:p></o:p></p>
<p class="MsoPlainText">
container_of(__work, struct amdgpu_device, xgmi_reset_work);<o:p></o:p></p>
<p class="MsoPlainText">+ struct amdgpu_hive_info *hive
= amdgpu_get_xgmi_hive(adev, 0);<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">- if
(amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO)<o:p></o:p></p>
<p class="MsoPlainText">-
adev->asic_reset_res = (adev->in_baco == false) ?<o:p></o:p></p>
<p class="MsoPlainText">-
amdgpu_device_baco_enter(adev->ddev) :<o:p></o:p></p>
<p class="MsoPlainText">-
qamdgpu_device_baco_exit(adev->ddev);<o:p></o:p></p>
<p class="MsoPlainText">- else<o:p></o:p></p>
<p class="MsoPlainText">-
adev->asic_reset_res = amdgpu_asic_reset(adev);<o:p></o:p></p>
<p class="MsoPlainText">+ /*<o:p></o:p></p>
<p class="MsoPlainText">+ * Use task barrier to
synchronize all xgmi reset works across the<o:p></o:p></p>
<p class="MsoPlainText">+ * hive.<o:p></o:p></p>
<p class="MsoPlainText">+ * task_barrier_enter and
task_barrier_exit will block untill all the<o:p></o:p></p>
<p class="MsoPlainText">+ * threads running the xgmi
reset works reach those points. I assume<o:p></o:p></p>
<p class="MsoPlainText">+ * guarantee of progress here
for all the threads as the workqueue code<o:p></o:p></p>
<p class="MsoPlainText">+ * creates new worker threads
as needed by amount of work items in queue<o:p></o:p></p>
<p class="MsoPlainText">+ * (see worker_thread) and
also each thread sleeps in the barrir and by<o:p></o:p></p>
<p class="MsoPlainText">+ * this yielding the CPU for
other work threads to make progress.<o:p></o:p></p>
<p class="MsoPlainText">+ */<o:p></o:p></p>
<p class="MsoPlainText"><span style="color:#203864">[Le]: This
comments can be adjusted since we switch to
system_unbound_wq in patch #5.<o:p></o:p></span></p>
<p class="MsoPlainText">+ if
(amdgpu_asic_reset_method(adev) == AMD_RESET_METHOD_BACO) {<o:p></o:p></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+ if (hive)<o:p></o:p></p>
<p class="MsoPlainText">+
task_barrier_enter(&hive->tb);<o:p></o:p></p>
<p class="MsoPlainText"><span style="color:#203864">[Le]: The
multiple hive condition can be checked only once and moved
to the location right after the assignment.</span></p>
</div>
</blockquote>
<p><br>
</p>
<p>Not sure what you meant here but in fact let's note that while in
amdgpu_device_xgmi_reset_func it's a bug for amdgpu_get_xgmi_hive
to return NULL so I think better instead to add
WARN_ON(!hive,"...") and return right at the beginning of the
function if indeed hive == NULL</p>
<p>Andrey<br>
</p>
<p><br>
</p>
<blockquote type="cite" cite="mid:MN2PR12MB4285C0500B7E9363A2CF7B89F6550@MN2PR12MB4285.namprd12.prod.outlook.com">
<div class="WordSection1">
<p class="MsoPlainText"><span style="color:#203864"><o:p></o:p></span></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+
adev->asic_reset_res =
amdgpu_device_baco_enter(adev->ddev);<o:p></o:p></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+ if
(adev->asic_reset_res)<o:p></o:p></p>
<p class="MsoPlainText">+ goto
fail;<o:p></o:p></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+ if (hive)<o:p></o:p></p>
<p class="MsoPlainText">+
task_barrier_exit(&hive->tb);<o:p></o:p></p>
<p class="MsoPlainText"><span style="color:#203864">[Le]: Same
as above.<o:p></o:p></span></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+
adev->asic_reset_res =
amdgpu_device_baco_exit(adev->ddev);<o:p></o:p></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+ if
(adev->asic_reset_res)<o:p></o:p></p>
<p class="MsoPlainText">+ goto
fail;<o:p></o:p></p>
<p class="MsoPlainText">+ } else {<o:p></o:p></p>
<p class="MsoPlainText">+ if (hive)<o:p></o:p></p>
<p class="MsoPlainText">+
task_barrier_full(&hive->tb);<o:p></o:p></p>
<p class="MsoPlainText"><span style="color:#203864">[Le]: Same
as above.<o:p></o:p></span></p>
<p class="MsoPlainText"><span style="color:#203864"><o:p> </o:p></span></p>
<p class="MsoPlainText"><span style="color:#203864">With above
addressed, Reviewed-by: Le Ma <<a href="mailto:Le.Ma@amd.com" moz-do-not-send="true"><span style="color:#033160">Le.Ma@amd.com</span></a>><o:p></o:p></span></p>
<p class="MsoPlainText"><span style="color:#203864"><o:p> </o:p></span></p>
<p class="MsoPlainText"><span style="color:#203864">Regards,<o:p></o:p></span></p>
<p class="MsoPlainText"><span style="color:#203864">Ma Le<o:p></o:p></span></p>
<p class="MsoPlainText">+<o:p></o:p></p>
<p class="MsoPlainText">+
adev->asic_reset_res = amdgpu_asic_reset(adev);<o:p></o:p></p>
<p class="MsoPlainText">+ }<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">+fail:<o:p></o:p></p>
<p class="MsoPlainText"> if (adev->asic_reset_res)<o:p></o:p></p>
<p class="MsoPlainText"> DRM_WARN("ASIC
reset failed with error, %d for drm dev, %s",<o:p></o:p></p>
<p class="MsoPlainText">
adev->asic_reset_res, adev->ddev->unique);<o:p></o:p></p>
<p class="MsoPlainText">--<o:p></o:p></p>
<p class="MsoPlainText">2.7.4<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
</div>
</blockquote>
</body>
</html>