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Hi Kevin,</div>
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<br>
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You mean like this? It's a bit lengthy.<br>
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<span></span><span>- ctx->c2p_train_data_offset &= ~(ONE_MiB - 1);<br>
</span><span>+ ctx->c2p_train_data_offset = ALIGN(ctx->c2p_train_data_offset, ONE_MiB);</span></div>
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<span><br>
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<span></span>Rico<br>
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<div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> Wang, Kevin(Yang) <Kevin1.Wang@amd.com><br>
<b>Sent:</b> Wednesday, December 18, 2019 16:56<br>
<b>To:</b> Yin, Tianci (Rico) <Tianci.Yin@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Tuikov, Luben <Luben.Tuikov@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Long,
Gang <Gang.Long@amd.com><br>
<b>Subject:</b> Re: [PATCH 1/2] drm/amdgpu: update the method to get fb_loc of memory training(V2)</font>
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[AMD Official Use Only - Internal Distribution Only]<br>
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comment inline.</div>
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<div id="x_divRplyFwdMsg" dir="ltr"><font style="font-size:11pt" face="Calibri, sans-serif" color="#000000"><b>From:</b> Tianci Yin <tianci.yin@amd.com><br>
<b>Sent:</b> Wednesday, December 18, 2019 4:50 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Tuikov, Luben <Luben.Tuikov@amd.com>; Koenig, Christian <Christian.Koenig@amd.com>; Deucher, Alexander <Alexander.Deucher@amd.com>; Zhang, Hawking <Hawking.Zhang@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Yuan, Xiaojie <Xiaojie.Yuan@amd.com>; Long,
Gang <Gang.Long@amd.com>; Wang, Kevin(Yang) <Kevin1.Wang@amd.com>; Yin, Tianci (Rico) <Tianci.Yin@amd.com><br>
<b>Subject:</b> [PATCH 1/2] drm/amdgpu: update the method to get fb_loc of memory training(V2)</font>
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<div class="x_BodyFragment"><font size="2"><span style="font-size:11pt">
<div class="x_PlainText">From: "Tianci.Yin" <tianci.yin@amd.com><br>
<br>
The method of getting fb_loc changed from parsing VBIOS to<br>
taking certain offset from top of VRAM<br>
<br>
Change-Id: I053b42fdb1d822722fa7980b2cd9f86b3fdce539<br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +-<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 2 +-<br>
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 38 ++-----------------<br>
.../gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h | 2 +-<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 ++-<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h | 7 ++++<br>
drivers/gpu/drm/amd/include/atomfirmware.h | 14 -------<br>
7 files changed, 19 insertions(+), 53 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
index a78a363b1d71..fa2cf8e7bc07 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h<br>
@@ -642,9 +642,8 @@ struct amdgpu_fw_vram_usage {<br>
struct amdgpu_bo *reserved_bo;<br>
void *va;<br>
<br>
- /* Offset on the top of VRAM, used as c2p write buffer.<br>
+ /* GDDR6 training support flag.<br>
*/<br>
- u64 mem_train_fb_loc;<br>
bool mem_train_support;<br>
};<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c<br>
index 9ba80d828876..fdd52d86a4d7 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c<br>
@@ -2022,7 +2022,7 @@ int amdgpu_atombios_init(struct amdgpu_device *adev)<br>
if (adev->is_atom_fw) {<br>
amdgpu_atomfirmware_scratch_regs_init(adev);<br>
amdgpu_atomfirmware_allocate_fb_scratch(adev);<br>
- ret = amdgpu_atomfirmware_get_mem_train_fb_loc(adev);<br>
+ ret = amdgpu_atomfirmware_get_mem_train_info(adev);<br>
if (ret) {<br>
DRM_ERROR("Failed to get mem train fb location.\n");<br>
return ret;<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c<br>
index ff4eb96bdfb5..58f9d8c3a17a 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c<br>
@@ -525,16 +525,12 @@ static int gddr6_mem_train_support(struct amdgpu_device *adev)<br>
return ret;<br>
}<br>
<br>
-int amdgpu_atomfirmware_get_mem_train_fb_loc(struct amdgpu_device *adev)<br>
+int amdgpu_atomfirmware_get_mem_train_info(struct amdgpu_device *adev)<br>
{<br>
struct atom_context *ctx = adev->mode_info.atom_context;<br>
- unsigned char *bios = ctx->bios;<br>
- struct vram_reserve_block *reserved_block;<br>
- int index, block_number;<br>
+ int index;<br>
uint8_t frev, crev;<br>
uint16_t data_offset, size;<br>
- uint32_t start_address_in_kb;<br>
- uint64_t offset;<br>
int ret;<br>
<br>
adev->fw_vram_usage.mem_train_support = false;<br>
@@ -569,32 +565,6 @@ int amdgpu_atomfirmware_get_mem_train_fb_loc(struct amdgpu_device *adev)<br>
return -EINVAL;<br>
}<br>
<br>
- reserved_block = (struct vram_reserve_block *)<br>
- (bios + data_offset + sizeof(struct atom_common_table_header));<br>
- block_number = ((unsigned int)size - sizeof(struct atom_common_table_header))<br>
- / sizeof(struct vram_reserve_block);<br>
- reserved_block += (block_number > 0) ? block_number-1 : 0;<br>
- DRM_DEBUG("block_number:0x%04x, last block: 0x%08xkb sz, %dkb fw, %dkb drv.\n",<br>
- block_number,<br>
- le32_to_cpu(reserved_block->start_address_in_kb),<br>
- le16_to_cpu(reserved_block->used_by_firmware_in_kb),<br>
- le16_to_cpu(reserved_block->used_by_driver_in_kb));<br>
- if (reserved_block->used_by_firmware_in_kb > 0) {<br>
- start_address_in_kb = le32_to_cpu(reserved_block->start_address_in_kb);<br>
- offset = (uint64_t)start_address_in_kb * ONE_KiB;<br>
- if ((offset & (ONE_MiB - 1)) < (4 * ONE_KiB + 1) ) {<br>
- offset -= ONE_MiB;<br>
- }<br>
-<br>
- offset &= ~(ONE_MiB - 1);<br>
- adev->fw_vram_usage.mem_train_fb_loc = offset;<br>
- adev->fw_vram_usage.mem_train_support = true;<br>
- DRM_DEBUG("mem_train_fb_loc:0x%09llx.\n", offset);<br>
- ret = 0;<br>
- } else {<br>
- DRM_ERROR("used_by_firmware_in_kb is 0!\n");<br>
- ret = -EINVAL;<br>
- }<br>
-<br>
- return ret;<br>
+ adev->fw_vram_usage.mem_train_support = true;<br>
+ return 0;<br>
}<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h<br>
index f871af5ea6f3..434fe2fa0089 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.h<br>
@@ -31,7 +31,7 @@ void amdgpu_atomfirmware_scratch_regs_init(struct amdgpu_device *adev);<br>
int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev);<br>
int amdgpu_atomfirmware_get_vram_info(struct amdgpu_device *adev,<br>
int *vram_width, int *vram_type, int *vram_vendor);<br>
-int amdgpu_atomfirmware_get_mem_train_fb_loc(struct amdgpu_device *adev);<br>
+int amdgpu_atomfirmware_get_mem_train_info(struct amdgpu_device *adev);<br>
int amdgpu_atomfirmware_get_clock_info(struct amdgpu_device *adev);<br>
int amdgpu_atomfirmware_get_gfx_info(struct amdgpu_device *adev);<br>
bool amdgpu_atomfirmware_mem_ecc_supported(struct amdgpu_device *adev);<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c<br>
index 2ff63d0414c9..ce5cb854bdb9 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c<br>
@@ -1705,7 +1705,11 @@ static int amdgpu_ttm_training_reserve_vram_init(struct amdgpu_device *adev)<br>
return 0;<br>
}<br>
<br>
- ctx->c2p_train_data_offset = adev->fw_vram_usage.mem_train_fb_loc;<br>
+ ctx->c2p_train_data_offset = adev->gmc.mc_vram_size;<br>
+ if ((ctx->c2p_train_data_offset & (ONE_MiB - 1)) < (4 * ONE_KiB + 1) ) {<br>
+ ctx->c2p_train_data_offset -= ONE_MiB;<br>
+ }</div>
<div class="x_PlainText">+ ctx->c2p_train_data_offset &= ~(ONE_MiB - 1);</div>
<div class="x_PlainText"><br>
</div>
<div class="x_PlainText"><b>[kevin]:</b></div>
<div class="x_PlainText"><b>i'd like to use the marco ALIGN() to simple above code.</b></div>
<div class="x_PlainText"><b>anyway, the patch Reviewed-by: Kevin Wang <kevin1.wang@amd.com></b></div>
<div class="x_PlainText"><br>
</div>
<div class="x_PlainText"> ctx->p2c_train_data_offset = (adev->gmc.mc_vram_size - GDDR6_MEM_TRAINING_OFFSET);<br>
ctx->train_data_size = GDDR6_MEM_TRAINING_DATA_SIZE_IN_BYTES;<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h<br>
index f1ebd424510c..19eb3e8456c7 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.h<br>
@@ -66,6 +66,13 @@ struct amdgpu_copy_mem {<br>
unsigned long offset;<br>
};<br>
<br>
+/* Definitions for constance */<br>
+enum amdgpu_internal_constants<br>
+{<br>
+ ONE_KiB = 0x400,<br>
+ ONE_MiB = 0x100000,<br>
+};<br>
+<br>
extern const struct ttm_mem_type_manager_func amdgpu_gtt_mgr_func;<br>
extern const struct ttm_mem_type_manager_func amdgpu_vram_mgr_func;<br>
<br>
diff --git a/drivers/gpu/drm/amd/include/atomfirmware.h b/drivers/gpu/drm/amd/include/atomfirmware.h<br>
index dd7cbc00a0aa..70146518174c 100644<br>
--- a/drivers/gpu/drm/amd/include/atomfirmware.h<br>
+++ b/drivers/gpu/drm/amd/include/atomfirmware.h<br>
@@ -672,20 +672,6 @@ struct vram_usagebyfirmware_v2_1<br>
uint16_t used_by_driver_in_kb; <br>
};<br>
<br>
-/* This is part of vram_usagebyfirmware_v2_1 */<br>
-struct vram_reserve_block<br>
-{<br>
- uint32_t start_address_in_kb;<br>
- uint16_t used_by_firmware_in_kb;<br>
- uint16_t used_by_driver_in_kb;<br>
-};<br>
-<br>
-/* Definitions for constance */<br>
-enum atomfirmware_internal_constants<br>
-{<br>
- ONE_KiB = 0x400,<br>
- ONE_MiB = 0x100000,<br>
-};<br>
<br>
/* <br>
***************************************************************************<br>
-- <br>
2.17.1<br>
<br>
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