<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=Windows-1252"> <style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style> </head> <body dir="ltr"> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <span>uint32_t channel_index = adev->umc.channel_idx_tbl[umc_inst * adev->umc.channel_inst_num + ch_inst];<br> </span></div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <span></span></div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <br> </div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> The code is too long, it can be separated into two lines.</div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <br> </div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> With that fixed, the patch is:</div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <br> </div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Reviewed-by: Tao Zhou <tao.zhou1@amd.com><br> </div> <div id="appendonsend"></div> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Clements, John <John.Clements@amd.com><br> <b>Sent:</b> Tuesday, January 7, 2020 4:31 PM<br> <b>To:</b> Chen, Guchun <Guchun.Chen@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br> <b>Subject:</b> RE: [PATCH] drm/amdgpu: updated UMC error address record with correct channel index</font> <div> </div> </div> <style>  </style> <div lang="EN-US" link="#0563C1" vlink="#954F72"> <div class="x_WordSection1"> <p class="x_msipheader87abd423" style="margin:0in; margin-bottom:.0001pt"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:#317100">[AMD Public Use]</span></p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Hello GuChun/Tao,</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Thank you for your feedback, I have implemented both of your changes.</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Thank you,</p> <p class="x_MsoNormal">John Clements</p> <p class="x_MsoNormal"> </p> <div> <div style="border:none; border-top:solid #E1E1E1 1.0pt; padding:3.0pt 0in 0in 0in"> <p class="x_MsoNormal"><b>From:</b> Chen, Guchun <Guchun.Chen@amd.com> <br> <b>Sent:</b> Tuesday, January 7, 2020 4:10 PM<br> <b>To:</b> Clements, John <John.Clements@amd.com>; amd-gfx@lists.freedesktop.org<br> <b>Subject:</b> RE: [PATCH] drm/amdgpu: updated UMC error address record with correct channel index</p> </div> </div> <p class="x_MsoNormal"> </p> <p class="x_msipheader87abd423" style="margin:0in; margin-bottom:.0001pt"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:#317100">[AMD Public Use]</span></p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">If we have to improve the macro definition for repetitive loops, I assume we can merge the two defines into one, like:</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">#define LOOP_UMC_CH_INST(umc_inst) for ((umc_inst) = 0; (umc_inst) < adev->umc.umc_inst##_num; (umc_inst)++)</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Then when we call the double loop, it can be done like:</p> <p class="x_MsoNormal">LOOP_UMC_CH_INST(umc_inst)</p> <p class="x_MsoNormal"> LOOP_UMC_CH_INST(channel_inst) {…</p> <div> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Next we should name the macro more friendly.</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Regards,</p> <p class="x_MsoNormal">Guchun</p> </div> <p class="x_MsoNormal"> </p> <div> <div style="border:none; border-top:solid #E1E1E1 1.0pt; padding:3.0pt 0in 0in 0in"> <p class="x_MsoNormal"><b>From:</b> Clements, John <<a href="mailto:John.Clements@amd.com">John.Clements@amd.com</a>> <br> <b>Sent:</b> Tuesday, January 7, 2020 3:28 PM<br> <b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>; dl.srdc_lnx_ras <<a href="mailto:dl.srdc_lnx_ras@amd.com">dl.srdc_lnx_ras@amd.com</a>><br> <b>Subject:</b> [PATCH] drm/amdgpu: updated UMC error address record with correct channel index</p> </div> </div> <p class="x_MsoNormal"> </p> <p class="x_msipheader4d0fcdd7" style="margin:0in; margin-bottom:.0001pt"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:#0078D7">[AMD Official Use Only - Internal Distribution Only]</span></p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Resolved issue with inputting an incorrect UMC channel index into the UMC error address record.</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Defined macros for repetitive for loops</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Thank you,</p> <p class="x_MsoNormal">John Clements</p> </div> </div> </body> </html>