<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style> </head> <body dir="ltr"> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Timeout issue are complicated. These patched can fix driver side issue. Acturus SPG timeout issue can be fixed with these patches. For other type of timeout issues are still under investigation.<br> </div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <br> </div> <div id="Signature"> <div id="divtagdefaultwrapper" dir="ltr" style="font-size:12pt; color:#000000; font-family:Calibri,Arial,Helvetica,sans-serif"> <p style="margin-top: 0px; margin-bottom: 0px;">Thanks & Best Regards!</p> <p style="margin-top: 0px; margin-bottom: 0px;"><br> </p> <p style="margin-top: 0px; margin-bottom: 0px;">James Zhu<br> </p> </div> </div> <div id="appendonsend"></div> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Liu, Leo <Leo.Liu@amd.com><br> <b>Sent:</b> Wednesday, February 12, 2020 10:11 AM<br> <b>To:</b> Zhu, James <James.Zhu@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br> <b>Subject:</b> RE: [PATCH 1/2] drm/amdgpu/vcn: fix race condition issue for vcn start</font> <div> </div> </div> <style>  </style> <div lang="EN-US" link="#0563C1" vlink="#954F72"> <div class="x_WordSection1"> <p class="x_MsoNormal">With your patches, still seeing the hung with multiple processes of decode, encode, and transcode.</p> <p class="x_MsoNormal">I think we need find the root cause of that and give a comprehensive fix either from driver side or firmware side or both.</p> <p class="x_MsoNormal"> </p> <p class="x_MsoNormal">Regards,</p> <p class="x_MsoNormal">Leo</p> <p class="x_MsoNormal"> </p> <div> <div style="border:none; border-top:solid #E1E1E1 1.0pt; padding:3.0pt 0in 0in 0in"> <p class="x_MsoNormal"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> <b>On Behalf Of </b>Zhu, James<br> <b>Sent:</b> Wednesday, February 12, 2020 9:28 AM<br> <b>To:</b> amd-gfx@lists.freedesktop.org<br> <b>Subject:</b> Re: [PATCH 1/2] drm/amdgpu/vcn: fix race condition issue for vcn start</p> </div> </div> <p class="x_MsoNormal"> </p> <p style="margin:15.0pt"><span style="font-size:10.0pt; font-family:"Arial",sans-serif; color:#0078D7">[AMD Official Use Only - Internal Distribution Only]</span></p> <p class="x_MsoNormal"> </p> <div> <div> <p class="x_MsoNormal"><span style="font-size:12.0pt; color:black">ping</span></p> </div> <div id="x_Signature"> <div> <p class="x_MsoNormal"> </p> <div class="x_MsoNormal" align="center" style="text-align:center"> <hr size="2" width="98%" align="center"> </div> <div id="x_divRplyFwdMsg"> <p class="x_MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Zhu, James <<a href="mailto:James.Zhu@amd.com">James.Zhu@amd.com</a>><br> <b>Sent:</b> Monday, February 10, 2020 1:06 PM<br> <b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br> <b>Cc:</b> Zhu, James <<a href="mailto:James.Zhu@amd.com">James.Zhu@amd.com</a>><br> <b>Subject:</b> [PATCH 1/2] drm/amdgpu/vcn: fix race condition issue for vcn start</span> </p> <div> <p class="x_MsoNormal"> </p> </div> </div> <div> <div> <p class="x_MsoNormal" style="margin-bottom:12.0pt">Fix race condition issue when multiple vcn starts are called.<br> <br> Signed-off-by: James Zhu <<a href="mailto:James.Zhu@amd.com">James.Zhu@amd.com</a>><br> ---<br> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++++<br> drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 1 +<br> 2 files changed, 5 insertions(+)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br> index f96464e..aa7663f 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br> @@ -63,6 +63,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)<br> int i, r;<br> <br> INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler);<br> + mutex_init(&adev->vcn.vcn_pg_lock);<br> <br> switch (adev->asic_type) {<br> case CHIP_RAVEN:<br> @@ -210,6 +211,7 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)<br> }<br> <br> release_firmware(adev->vcn.fw);<br> + mutex_destroy(&adev->vcn.vcn_pg_lock);<br> <br> return 0;<br> }<br> @@ -321,6 +323,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)<br> struct amdgpu_device *adev = ring->adev;<br> bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);<br> <br> + mutex_lock(&adev->vcn.vcn_pg_lock);<br> if (set_clocks) {<br> amdgpu_gfx_off_ctrl(adev, false);<br> amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,<br> @@ -345,6 +348,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)<br> <br> adev->vcn.pause_dpg_mode(adev, ring->me, &new_state);<br> }<br> + mutex_unlock(&adev->vcn.vcn_pg_lock);<br> }<br> <br> void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)<br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br> index 6fe0573..2ae110d 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br> @@ -200,6 +200,7 @@ struct amdgpu_vcn {<br> struct drm_gpu_scheduler *vcn_dec_sched[AMDGPU_MAX_VCN_INSTANCES];<br> uint32_t num_vcn_enc_sched;<br> uint32_t num_vcn_dec_sched;<br> + struct mutex vcn_pg_lock;<br> <br> unsigned harvest_config;<br> int (*pause_dpg_mode)(struct amdgpu_device *adev,<br> -- <br> 2.7.4</p> </div> </div> </div> </div> </div> </div> </div> </body> </html>