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<p class="MsoNormal">With your patches, still seeing the hung with multiple processes of decode, encode, and transcode.<o:p></o:p></p>
<p class="MsoNormal">I think we need find the root cause of that and give a comprehensive fix either from driver side or firmware side or both.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Regards,<o:p></o:p></p>
<p class="MsoNormal">Leo<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org>
<b>On Behalf Of </b>Zhu, James<br>
<b>Sent:</b> Wednesday, February 12, 2020 9:28 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org<br>
<b>Subject:</b> Re: [PATCH 1/2] drm/amdgpu/vcn: fix race condition issue for vcn start<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p style="margin:15.0pt"><span style="font-size:10.0pt;font-family:"Arial",sans-serif;color:#0078D7">[AMD Official Use Only - Internal Distribution Only]<o:p></o:p></span></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><span style="font-size:12.0pt;color:black">ping<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b><span style="color:black">From:</span></b><span style="color:black"> Zhu, James <<a href="mailto:James.Zhu@amd.com">James.Zhu@amd.com</a>><br>
<b>Sent:</b> Monday, February 10, 2020 1:06 PM<br>
<b>To:</b> <a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <<a href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a>><br>
<b>Cc:</b> Zhu, James <<a href="mailto:James.Zhu@amd.com">James.Zhu@amd.com</a>><br>
<b>Subject:</b> [PATCH 1/2] drm/amdgpu/vcn: fix race condition issue for vcn start</span>
<o:p></o:p></p>
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<p class="MsoNormal"> <o:p></o:p></p>
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<p class="MsoNormal" style="margin-bottom:12.0pt">Fix race condition issue when multiple vcn starts are called.<br>
<br>
Signed-off-by: James Zhu <<a href="mailto:James.Zhu@amd.com">James.Zhu@amd.com</a>><br>
---<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 4 ++++<br>
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h | 1 +<br>
2 files changed, 5 insertions(+)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br>
index f96464e..aa7663f 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c<br>
@@ -63,6 +63,7 @@ int amdgpu_vcn_sw_init(struct amdgpu_device *adev)<br>
int i, r;<br>
<br>
INIT_DELAYED_WORK(&adev->vcn.idle_work, amdgpu_vcn_idle_work_handler);<br>
+ mutex_init(&adev->vcn.vcn_pg_lock);<br>
<br>
switch (adev->asic_type) {<br>
case CHIP_RAVEN:<br>
@@ -210,6 +211,7 @@ int amdgpu_vcn_sw_fini(struct amdgpu_device *adev)<br>
}<br>
<br>
release_firmware(adev->vcn.fw);<br>
+ mutex_destroy(&adev->vcn.vcn_pg_lock);<br>
<br>
return 0;<br>
}<br>
@@ -321,6 +323,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)<br>
struct amdgpu_device *adev = ring->adev;<br>
bool set_clocks = !cancel_delayed_work_sync(&adev->vcn.idle_work);<br>
<br>
+ mutex_lock(&adev->vcn.vcn_pg_lock);<br>
if (set_clocks) {<br>
amdgpu_gfx_off_ctrl(adev, false);<br>
amdgpu_device_ip_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_VCN,<br>
@@ -345,6 +348,7 @@ void amdgpu_vcn_ring_begin_use(struct amdgpu_ring *ring)<br>
<br>
adev->vcn.pause_dpg_mode(adev, ring->me, &new_state);<br>
}<br>
+ mutex_unlock(&adev->vcn.vcn_pg_lock);<br>
}<br>
<br>
void amdgpu_vcn_ring_end_use(struct amdgpu_ring *ring)<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br>
index 6fe0573..2ae110d 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h<br>
@@ -200,6 +200,7 @@ struct amdgpu_vcn {<br>
struct drm_gpu_scheduler *vcn_dec_sched[AMDGPU_MAX_VCN_INSTANCES];<br>
uint32_t num_vcn_enc_sched;<br>
uint32_t num_vcn_dec_sched;<br>
+ struct mutex vcn_pg_lock;<br>
<br>
unsigned harvest_config;<br>
int (*pause_dpg_mode)(struct amdgpu_device *adev,<br>
-- <br>
2.7.4<o:p></o:p></p>
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