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[AMD Public Use]<br>
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Please also revert this fix:</div>
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<a href="https://cgit.freedesktop.org/~agd5f/linux/commit/?h=amd-staging-drm-next&id=4e261b86437af7481364a5239c62cc3c5ef0ee38" id="LPlnk925851">https://cgit.freedesktop.org/~agd5f/linux/commit/?h=amd-staging-drm-next&id=4e261b86437af7481364a5239c62cc3c5ef0ee38</a></div>
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Alex<br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Quan, Evan <Evan.Quan@amd.com><br>
<b>Sent:</b> Thursday, February 27, 2020 10:37 PM<br>
<b>To:</b> Gui, Jack <Jack.Gui@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Xu, Feifei <Feifei.Xu@amd.com>; Feng, Kenneth <Kenneth.Feng@amd.com>; Gui, Jack <Jack.Gui@amd.com><br>
<b>Subject:</b> RE: [PATCH 1/2] Revert "drm/amdgpu: add sysfs interface to set arbitrary sclk value for navi14"</font>
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<div class="PlainText">Reviewed-by: Evan Quan <evan.quan@amd.com><br>
<br>
-----Original Message-----<br>
From: Chengming Gui <Jack.Gui@amd.com> <br>
Sent: Friday, February 28, 2020 10:37 AM<br>
To: amd-gfx@lists.freedesktop.org<br>
Cc: Quan, Evan <Evan.Quan@amd.com>; Feng, Kenneth <Kenneth.Feng@amd.com>; Xu, Feifei <Feifei.Xu@amd.com>; Gui, Jack <Jack.Gui@amd.com><br>
Subject: [PATCH 1/2] Revert "drm/amdgpu: add sysfs interface to set arbitrary sclk value for navi14"<br>
<br>
Revert this commit and than add debugfs interface to replace this to meet the specitic requirement.<br>
<br>
This reverts commit 3107269204f8e18f389080673f7848b420970aa5.<br>
---<br>
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c    | 42 -------------------------------<br>
 drivers/gpu/drm/amd/powerplay/smu_v11_0.c |  9 ++-----<br>
 2 files changed, 2 insertions(+), 49 deletions(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
index 9deff8c..bc3cf04 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c<br>
@@ -1034,40 +1034,6 @@ static ssize_t amdgpu_read_mask(const char *buf, size_t count, uint32_t *mask)<br>
         return 0;<br>
 }<br>
 <br>
-static ssize_t amdgpu_set_pp_sclk(struct device *dev,<br>
-               struct device_attribute *attr,<br>
-               const char *buf,<br>
-               size_t count)<br>
-{<br>
-       struct drm_device *ddev = dev_get_drvdata(dev);<br>
-       struct amdgpu_device *adev = ddev->dev_private;<br>
-       int ret;<br>
-       uint32_t value;<br>
-<br>
-       if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))<br>
-               return -EINVAL;<br>
-<br>
-       ret = pm_runtime_get_sync(ddev->dev);<br>
-       if (ret < 0)<br>
-               return ret;<br>
-<br>
-       ret = kstrtou32(buf, 0, &value);<br>
-       if (ret < 0)<br>
-               return ret;<br>
-       if (is_support_sw_smu(adev))<br>
-               ret = smu_set_soft_freq_range(&adev->smu, SMU_SCLK, value, value);<br>
-       else<br>
-               return 0;<br>
-<br>
-       pm_runtime_mark_last_busy(ddev->dev);<br>
-       pm_runtime_put_autosuspend(ddev->dev);<br>
-<br>
-       if (ret)<br>
-               return -EINVAL;<br>
-<br>
-       return count;<br>
-}<br>
-<br>
 static ssize_t amdgpu_set_pp_dpm_sclk(struct device *dev,<br>
                 struct device_attribute *attr,<br>
                 const char *buf,<br>
@@ -1829,8 +1795,6 @@ static DEVICE_ATTR(pp_force_state, S_IRUGO | S_IWUSR,  static DEVICE_ATTR(pp_table, S_IRUGO | S_IWUSR,<br>
                 amdgpu_get_pp_table,<br>
                 amdgpu_set_pp_table);<br>
-static DEVICE_ATTR(pp_sclk, S_IWUSR,<br>
-               NULL, amdgpu_set_pp_sclk);<br>
 static DEVICE_ATTR(pp_dpm_sclk, S_IRUGO | S_IWUSR,<br>
                 amdgpu_get_pp_dpm_sclk,<br>
                 amdgpu_set_pp_dpm_sclk);<br>
@@ -3322,12 +3286,6 @@ int amdgpu_pm_sysfs_init(struct amdgpu_device *adev)<br>
                 return ret;<br>
         }<br>
 <br>
-       ret = device_create_file(adev->dev, &dev_attr_pp_sclk);<br>
-       if (ret) {<br>
-               DRM_ERROR("failed to create device file pp_sclk\n");<br>
-               return ret;<br>
-       }<br>
-<br>
         ret = device_create_file(adev->dev, &dev_attr_pp_dpm_sclk);<br>
         if (ret) {<br>
                 DRM_ERROR("failed to create device file pp_dpm_sclk\n"); diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
index 1507bb7..c9e5ce1 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c<br>
@@ -1803,17 +1803,12 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_  {<br>
         int ret = 0, clk_id = 0;<br>
         uint32_t param;<br>
-       uint32_t min_freq, max_freq;<br>
 <br>
         clk_id = smu_clk_get_index(smu, clk_type);<br>
         if (clk_id < 0)<br>
                 return clk_id;<br>
 <br>
-       ret = smu_get_dpm_freq_range(smu, clk_type, &min_freq, &max_freq, true);<br>
-       if (ret)<br>
-               return ret;<br>
-<br>
-       if (max > 0 && max <=  max_freq) {<br>
+       if (max > 0) {<br>
                 param = (uint32_t)((clk_id << 16) | (max & 0xffff));<br>
                 ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMaxByFreq,<br>
                                                   param);<br>
@@ -1821,7 +1816,7 @@ int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_<br>
                         return ret;<br>
         }<br>
 <br>
-       if (min > 0 && min >= min_freq) {<br>
+       if (min > 0) {<br>
                 param = (uint32_t)((clk_id << 16) | (min & 0xffff));<br>
                 ret = smu_send_smc_msg_with_param(smu, SMU_MSG_SetSoftMinByFreq,<br>
                                                   param);<br>
--<br>
2.7.4<br>
<br>
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