<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style> </head> <body dir="ltr"> <p style="font-family:Arial;font-size:10pt;color:#317100;margin:15pt;" align="Left"> [AMD Public Use]<br> </p> <br> <div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Yes, something like that.</div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> <br> </div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Alex<br> </div> <div id="appendonsend"></div> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Kuehling, Felix <Felix.Kuehling@amd.com><br> <b>Sent:</b> Friday, March 20, 2020 10:47 AM<br> <b>To:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Sierra Guiza, Alejandro (Alex) <Alex.Sierra@amd.com>; amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br> <b>Subject:</b> Re: [PATCH 1/4] drm/amdgpu: add stride to calculate oss ring offsets</font> <div> </div> </div> <div> <p><br> </p> <div class="x_moz-cite-prefix">On 2020-03-20 10:39, Deucher, Alexander wrote:<br> </div> <blockquote type="cite"><style type="text/css" style="display:none">  </style> <p align="Left" style="font-family:Arial; font-size:10pt; color:#317100; margin:15pt"> [AMD Public Use]<br> </p> <br> <div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> I'm worried we'll miss a register by accident. We went with per IP sub drivers to avoid handling complexities around IP differences if possible. Also the scheme seems like kind of a one off compared to what we do for other IPs. Can we structure it more like how we handle SDMA instancing since it seems to mainly affect IH RB instances? <br> </div> </div> </blockquote> <p>That's more or less what I had in mind, but haven't looked at the SDMA implementation in detail. So do you mean defining macros WREG32_IH_RING(ring, offset, value) and RREG32_IH_RING(ring, offset) analogous to WREG32_SDMA and RREG32_SDMA? It would only apply to IH ring-specific registers. Not to other general IH registers.<br> </p> <p><br> </p> <p>Regards,<br> Felix<br> </p> <p><br> </p> <blockquote type="cite"> <div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Alex</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> Kuehling, Felix <a class="x_moz-txt-link-rfc2396E" href="mailto:Felix.Kuehling@amd.com"><Felix.Kuehling@amd.com></a><br> <b>Sent:</b> Friday, March 20, 2020 10:20 AM<br> <b>To:</b> Deucher, Alexander <a class="x_moz-txt-link-rfc2396E" href="mailto:Alexander.Deucher@amd.com"> <Alexander.Deucher@amd.com></a>; Sierra Guiza, Alejandro (Alex) <a class="x_moz-txt-link-rfc2396E" href="mailto:Alex.Sierra@amd.com"> <Alex.Sierra@amd.com></a>; <a class="x_moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org"> amd-gfx@lists.freedesktop.org</a> <a class="x_moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"> <amd-gfx@lists.freedesktop.org></a><br> <b>Subject:</b> Re: [PATCH 1/4] drm/amdgpu: add stride to calculate oss ring offsets</font> <div> </div> </div> <div> <div class="x_x_moz-cite-prefix">On 2020-03-20 10:06, Deucher, Alexander wrote:<br> </div> <blockquote type="cite"><style type="text/css" style="display:none">  </style> <p align="Left" style="font-family:Arial; font-size:10pt; color:#317100; margin:15pt"> [AMD Public Use]<br> </p> <br> <div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> This seems kind of complicated and error prone. I didn't realize the extent to the changes required. I think it would be better to either add arcturus specific versions of these functions or just go with your original approach and add a new arcturus_ih.c. If you go with the second route however, no need to show all your intermediate steps, just add the new files in one commit.</div> </div> </blockquote> <p>Hi Alex,</p> <p><br> </p> <p>I suggested the approach in this patch series since to minimize code duplication and maintain readability of the code. I don't think it's very error prone. I believe this is more maintainable than a separate arcturus_ih.c. I'll have some more specific comments on Alejandro's patches.</p> <p><br> </p> <p>Regards,<br> Felix<br> </p> <p><br> </p> <blockquote type="cite"> <div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> Alex</div> <div style="font-family:Calibri,Arial,Helvetica,sans-serif; font-size:12pt; color:rgb(0,0,0)"> <br> </div> <hr tabindex="-1" style="display:inline-block; width:98%"> <div id="x_x_divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <a class="x_x_moz-txt-link-rfc2396E" href="mailto:amd-gfx-bounces@lists.freedesktop.org"> <amd-gfx-bounces@lists.freedesktop.org></a> on behalf of Alex Sierra <a class="x_x_moz-txt-link-rfc2396E" href="mailto:alex.sierra@amd.com"> <alex.sierra@amd.com></a><br> <b>Sent:</b> Thursday, March 19, 2020 8:22 PM<br> <b>To:</b> <a class="x_x_moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org"> amd-gfx@lists.freedesktop.org</a> <a class="x_x_moz-txt-link-rfc2396E" href="mailto:amd-gfx@lists.freedesktop.org"> <amd-gfx@lists.freedesktop.org></a><br> <b>Cc:</b> Sierra Guiza, Alejandro (Alex) <a class="x_x_moz-txt-link-rfc2396E" href="mailto:Alex.Sierra@amd.com"> <Alex.Sierra@amd.com></a><br> <b>Subject:</b> [PATCH 1/4] drm/amdgpu: add stride to calculate oss ring offsets</font> <div> </div> </div> <div class="x_x_BodyFragment"><font size="2"><span style="font-size:11pt"> <div class="x_x_PlainText">Arcturus and vega10 share the same vega10_ih, however both<br> have different register offsets at the ih ring section.<br> This variable is used to help calculate ih ring register addresses<br> from the osssys, that corresponds to the current asic type.<br> <br> Signed-off-by: Alex Sierra <a class="x_x_moz-txt-link-rfc2396E" href="mailto:alex.sierra@amd.com"> <alex.sierra@amd.com></a><br> ---<br> drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 4 ++++<br> drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 1 +<br> 2 files changed, 5 insertions(+)<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br> index 5ed4227f304b..fa384ae9a9bc 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br> @@ -279,6 +279,10 @@ int amdgpu_irq_init(struct amdgpu_device *adev)<br> amdgpu_hotplug_work_func);<br> }<br> <br> + if (adev->asic_type == CHIP_ARCTURUS)<br> + adev->irq.ring_stride = 1;<br> + else<br> + adev->irq.ring_stride = 0;<br> INIT_WORK(&adev->irq.ih1_work, amdgpu_irq_handle_ih1);<br> INIT_WORK(&adev->irq.ih2_work, amdgpu_irq_handle_ih2);<br> <br> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h<br> index c718e94a55c9..1ec5b735cd9e 100644<br> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h<br> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h<br> @@ -97,6 +97,7 @@ struct amdgpu_irq {<br> struct irq_domain *domain; /* GPU irq controller domain */<br> unsigned virq[AMDGPU_MAX_IRQ_SRC_ID];<br> uint32_t srbm_soft_reset;<br> + unsigned ring_stride;<br> };<br> <br> void amdgpu_irq_disable_all(struct amdgpu_device *adev);<br> -- <br> 2.17.1<br> <br> _______________________________________________<br> amd-gfx mailing list<br> <a class="x_x_moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a><br> <a href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cfelix.kuehling%40amd.com%7C7e44179e2a0d49c972ba08d7ccd7e626%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637203100032276037&sdata=bs%2F33P5feC0SRxcy6JyiVLkLG6uA7fSWQ4EeCmGItU0%3D&reserved=0" originalsrc="https://lists.freedesktop.org/mailman/listinfo/amd-gfx" shash="RpptISRMfKBBZP2h2HOxGfxgMoH70rCb+ynpCaxpjoQfUURByH8bfh2o5xfNNLXX/0W1br0JWtFqcIbbajPUmDwP09Xlet5BBf2vF6seIhDiQAhlTwrUgbF6br2BVN3Rfr+uSoF6bz83ifpZaF1KhW4RGW4V+rHlh2VDoaZ45h4=">https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Calexander.deucher%40amd.com%7C17d5391c86ff4ceee12b08d7cc64f056%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637202606831789803&sdata=B%2BbtLEKN5A65OEp8se5m1M4aQGX7kxsqYYGTTukF5m8%3D&reserved=0</a><br> </div> </span></font></div> </div> <br> <fieldset class="x_x_mimeAttachmentHeader"></fieldset> <pre class="x_x_moz-quote-pre">_______________________________________________ amd-gfx mailing list <a class="x_x_moz-txt-link-abbreviated" href="mailto:amd-gfx@lists.freedesktop.org">amd-gfx@lists.freedesktop.org</a> <a class="x_x_moz-txt-link-freetext" href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cfelix.kuehling%40amd.com%7C7e44179e2a0d49c972ba08d7ccd7e626%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637203100032296023&sdata=bil9pUebulcGpl5YhTi9k6yqK8wYDzw6XN%2FSZ9YbR44%3D&reserved=0">https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Cfelix.kuehling%40amd.com%7C7e44179e2a0d49c972ba08d7ccd7e626%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637203100032296023&sdata=bil9pUebulcGpl5YhTi9k6yqK8wYDzw6XN%2FSZ9YbR44%3D&reserved=0</a> </pre> </blockquote> </div> </div> </blockquote> </div> </div> </body> </html>