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    <div class="moz-cite-prefix">Am 20.03.20 um 15:20 schrieb Felix
      Kuehling:<br>
    </div>
    <blockquote type="cite"
      cite="mid:50a79ebd-ab45-927b-a44d-dba313a72953@amd.com">
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      <div class="moz-cite-prefix">On 2020-03-20 10:06, Deucher,
        Alexander wrote:<br>
      </div>
      <blockquote type="cite"
cite="mid:MN2PR12MB4488EFB20868482AC55D3C14F7F50@MN2PR12MB4488.namprd12.prod.outlook.com">
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        <p
          style="font-family:Arial;font-size:10pt;color:#317100;margin:15pt;"
          align="Left"> [AMD Public Use]<br>
        </p>
        <br>
        <div>
          <div style="font-family: Calibri, Arial, Helvetica,
            sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> This
            seems kind of complicated and error prone.  I didn't realize
            the extent to the changes required.  I think it would be
            better to either add arcturus specific versions of these
            functions or just go with your original approach and add a
            new arcturus_ih.c.  If you go with the second route however,
            no need to show all your intermediate steps, just add the
            new files in one commit.</div>
        </div>
      </blockquote>
      <p>Hi Alex,</p>
      <p><br>
      </p>
      <p>I suggested the approach in this patch series since to minimize
        code duplication and maintain readability of the code. I don't
        think it's very error prone. I believe this is more maintainable
        than a separate arcturus_ih.c. I'll have some more specific
        comments on Alejandro's patches.</p>
    </blockquote>
    <br>
    Question is rather if Arcturus has really the same OSS block than
    Vega10 or if the registers are just the same and at a different
    offset?<br>
    <br>
    If the later (which I suspect) than that should really be the same
    file.<br>
    <br>
    Regards,<br>
    Christian.<br>
    <br>
    <blockquote type="cite"
      cite="mid:50a79ebd-ab45-927b-a44d-dba313a72953@amd.com">
      <p><br>
      </p>
      <p>Regards,<br>
          Felix<br>
      </p>
      <p><br>
      </p>
      <blockquote type="cite"
cite="mid:MN2PR12MB4488EFB20868482AC55D3C14F7F50@MN2PR12MB4488.namprd12.prod.outlook.com">
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          <div style="font-family: Calibri, Arial, Helvetica,
            sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Alex</div>
          <div style="font-family: Calibri, Arial, Helvetica,
            sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">   <br>
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          <div id="divRplyFwdMsg" dir="ltr"><font style="font-size:11pt"
              face="Calibri, sans-serif" color="#000000"><b>From:</b>
              amd-gfx <a class="moz-txt-link-rfc2396E"
                href="mailto:amd-gfx-bounces@lists.freedesktop.org"
                moz-do-not-send="true"><amd-gfx-bounces@lists.freedesktop.org></a>
              on behalf of Alex Sierra <a class="moz-txt-link-rfc2396E"
                href="mailto:alex.sierra@amd.com" moz-do-not-send="true"><alex.sierra@amd.com></a><br>
              <b>Sent:</b> Thursday, March 19, 2020 8:22 PM<br>
              <b>To:</b> <a class="moz-txt-link-abbreviated"
                href="mailto:amd-gfx@lists.freedesktop.org"
                moz-do-not-send="true">amd-gfx@lists.freedesktop.org</a>
              <a class="moz-txt-link-rfc2396E"
                href="mailto:amd-gfx@lists.freedesktop.org"
                moz-do-not-send="true"><amd-gfx@lists.freedesktop.org></a><br>
              <b>Cc:</b> Sierra Guiza, Alejandro (Alex) <a
                class="moz-txt-link-rfc2396E"
                href="mailto:Alex.Sierra@amd.com" moz-do-not-send="true"><Alex.Sierra@amd.com></a><br>
              <b>Subject:</b> [PATCH 1/4] drm/amdgpu: add stride to
              calculate oss ring offsets</font>
            <div> </div>
          </div>
          <div class="BodyFragment"><font size="2"><span
                style="font-size:11pt;">
                <div class="PlainText">Arcturus and vega10 share the
                  same vega10_ih, however both<br>
                  have different register offsets at the ih ring
                  section.<br>
                  This variable is used to help calculate ih ring
                  register addresses<br>
                  from the osssys, that corresponds to the current asic
                  type.<br>
                  <br>
                  Signed-off-by: Alex Sierra <a
                    class="moz-txt-link-rfc2396E"
                    href="mailto:alex.sierra@amd.com"
                    moz-do-not-send="true"><alex.sierra@amd.com></a><br>
                  ---<br>
                   drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 4 ++++<br>
                   drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h | 1 +<br>
                   2 files changed, 5 insertions(+)<br>
                  <br>
                  diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
                  b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br>
                  index 5ed4227f304b..fa384ae9a9bc 100644<br>
                  --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br>
                  +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c<br>
                  @@ -279,6 +279,10 @@ int amdgpu_irq_init(struct
                  amdgpu_device *adev)<br>
                                                  
                  amdgpu_hotplug_work_func);<br>
                           }<br>
                   <br>
                  +       if (adev->asic_type == CHIP_ARCTURUS)<br>
                  +               adev->irq.ring_stride = 1;<br>
                  +       else<br>
                  +               adev->irq.ring_stride = 0;<br>
                           INIT_WORK(&adev->irq.ih1_work,
                  amdgpu_irq_handle_ih1);<br>
                           INIT_WORK(&adev->irq.ih2_work,
                  amdgpu_irq_handle_ih2);<br>
                   <br>
                  diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h
                  b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h<br>
                  index c718e94a55c9..1ec5b735cd9e 100644<br>
                  --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h<br>
                  +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.h<br>
                  @@ -97,6 +97,7 @@ struct amdgpu_irq {<br>
                           struct irq_domain               *domain; /*
                  GPU irq controller domain */<br>
                           unsigned                       
                  virq[AMDGPU_MAX_IRQ_SRC_ID];<br>
                           uint32_t                       
                  srbm_soft_reset;<br>
                  +       unsigned                        ring_stride;<br>
                   };<br>
                   <br>
                   void amdgpu_irq_disable_all(struct amdgpu_device
                  *adev);<br>
                  -- <br>
                  2.17.1<br>
                  <br>
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      <pre class="moz-quote-pre" wrap="">_______________________________________________
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