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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" color="#000000" style="font-size:11pt"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Yuxian Dai <Yuxian.Dai@amd.com><br>
<b>Sent:</b> Wednesday, April 1, 2020 3:14 PM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Dai, Yuxian (David) <Yuxian.Dai@amd.com>; Dai, Yuxian (David) <Yuxian.Dai@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu/powerplay: using the FCLK DPM table to set the MCLK</font>
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<div class="BodyFragment"><font size="2"><span style="font-size:11pt">
<div class="PlainText">From: "yuxiadai@amd.com" <yuxiadai@amd.com><br>
<br>
1,Using the FCLK DPM table to set the MCLK for DPM states consist of<br>
three entities:<br>
 FCLK<br>
 UCLK<br>
 MEMCLK<br>
All these three clk change together, MEMCLK from FCLK, so use the fclk<br>
frequency.<br>
2,we should show the current working clock freqency from clock table metric<br>
<br>
Change-Id: Ia45f3069fc7ae56db495cb5a3865e2c50c550774<br>
Signed-off-by: Yuxian Dai <Yuxian.Dai@amd.com><br>
---<br>
 drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 7 +++++++<br>
 drivers/gpu/drm/amd/powerplay/renoir_ppt.h | 2 +-<br>
 2 files changed, 8 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c<br>
index 7bf52ecba01d..3901b20196d7 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c<br>
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c<br>
@@ -239,6 +239,7 @@ static int renoir_print_clk_levels(struct smu_context *smu,<br>
         uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0;<br>
         DpmClocks_t *clk_table = smu->smu_table.clocks_table;<br>
         SmuMetrics_t metrics;<br>
+       bool cur_value_match_level = false;<br>
 <br>
         if (!clk_table || clk_type >= SMU_CLK_COUNT)<br>
                 return -EINVAL;<br>
@@ -297,7 +298,13 @@ static int renoir_print_clk_levels(struct smu_context *smu,<br>
                 GET_DPM_CUR_FREQ(clk_table, clk_type, i, value);<br>
                 size += sprintf(buf + size, "%d: %uMhz %s\n", i, value,<br>
                                 cur_value == value ? "*" : "");<br>
+               if (cur_value == value) <br>
+                       cur_value_match_level = true;<br>
         }<br>
+       <br>
+       if (!cur_value_match_level)<br>
+               size += sprintf(buf + size, "   %uMhz *\n",cur_value);<br>
+</div>
<div class="PlainText">[kevin]:</div>
<div class="PlainText"><span>after remove this unnecessary blank line,</span></div>
<div class="PlainText"><span>Reviewed-by: Kevin Wang <kevin1.wang@amd.com><br>
</span><span></span> <br>
         return size;<br>
 }<br>
diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h<br>
index 2a390ddd37dd..89cd6da118a3 100644<br>
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.h<br>
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.h<br>
@@ -37,7 +37,7 @@ extern void renoir_set_ppt_funcs(struct smu_context *smu);<br>
                         freq = table->SocClocks[dpm_level].Freq;        \<br>
                         break;                                          \<br>
                 case SMU_MCLK:                                          \<br>
-                       freq = table->MemClocks[dpm_level].Freq;        \<br>
+                       freq = table->FClocks[dpm_level].Freq;  \<br>
                         break;                                          \<br>
                 case SMU_DCEFCLK:                                       \<br>
                         freq = table->DcfClocks[dpm_level].Freq;        \<br>
-- <br>
2.17.1<br>
<br>
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