<html> <head> <meta http-equiv="Content-Type" content="text/html; charset=us-ascii"> <style type="text/css" style="display:none;"> P {margin-top:0;margin-bottom:0;} </style> </head> <body dir="ltr"> <p style="font-family:Arial;font-size:10pt;color:#317100;margin:15pt;" align="Left"> [AMD Public Use]<br> </p> <br> <div> <div style="font-family: Calibri, Arial, Helvetica, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"> Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br> </div> <div id="appendonsend"></div> <hr style="display:inline-block;width:98%" tabindex="-1"> <div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> amd-gfx <amd-gfx-bounces@lists.freedesktop.org> on behalf of Yong Zhao <Yong.Zhao@amd.com><br> <b>Sent:</b> Tuesday, May 26, 2020 8:57 PM<br> <b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br> <b>Cc:</b> Zhao, Yong <Yong.Zhao@amd.com><br> <b>Subject:</b> [PATCH] drm/amdgpu: Improve the MTYPE comments</font> <div> </div> </div> <div class="BodyFragment"><font size="2"><span style="font-size:11pt;"> <div class="PlainText">Use words insteads of acronym for better understanding.<br> <br> Signed-off-by: Yong Zhao <Yong.Zhao@amd.com><br> ---<br> include/uapi/drm/amdgpu_drm.h | 10 +++++-----<br> 1 file changed, 5 insertions(+), 5 deletions(-)<br> <br> diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h<br> index d65f9b4ba05c..0072ddb59747 100644<br> --- a/include/uapi/drm/amdgpu_drm.h<br> +++ b/include/uapi/drm/amdgpu_drm.h<br> @@ -564,15 +564,15 @@ struct drm_amdgpu_gem_op {<br> #define AMDGPU_VM_MTYPE_MASK (0xf << 5)<br> /* Default MTYPE. Pre-AI must use this. Recommended for newer ASICs. */<br> #define AMDGPU_VM_MTYPE_DEFAULT (0 << 5)<br> -/* Use NC MTYPE instead of default MTYPE */<br> +/* Use Non Coherent MTYPE instead of default MTYPE */<br> #define AMDGPU_VM_MTYPE_NC (1 << 5)<br> -/* Use WC MTYPE instead of default MTYPE */<br> +/* Use Write Combine MTYPE instead of default MTYPE */<br> #define AMDGPU_VM_MTYPE_WC (2 << 5)<br> -/* Use CC MTYPE instead of default MTYPE */<br> +/* Use Cache Coherent MTYPE instead of default MTYPE */<br> #define AMDGPU_VM_MTYPE_CC (3 << 5)<br> -/* Use UC MTYPE instead of default MTYPE */<br> +/* Use UnCached MTYPE instead of default MTYPE */<br> #define AMDGPU_VM_MTYPE_UC (4 << 5)<br> -/* Use RW MTYPE instead of default MTYPE */<br> +/* Use Read Write MTYPE instead of default MTYPE */<br> #define AMDGPU_VM_MTYPE_RW (5 << 5)<br> <br> struct drm_amdgpu_gem_va {<br> -- <br> 2.17.1<br> <br> _______________________________________________<br> amd-gfx mailing list<br> amd-gfx@lists.freedesktop.org<br> <a href="https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Calexander.deucher%40amd.com%7C03cfa3ceeaba4d63650c08d801d8fd40%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637261378796371099&sdata=kxt8S5LusNmcfRDbv9vgxYlMjPoaA6C3AJIHkXTOq5A%3D&reserved=0">https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Flists.freedesktop.org%2Fmailman%2Flistinfo%2Famd-gfx&data=02%7C01%7Calexander.deucher%40amd.com%7C03cfa3ceeaba4d63650c08d801d8fd40%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637261378796371099&sdata=kxt8S5LusNmcfRDbv9vgxYlMjPoaA6C3AJIHkXTOq5A%3D&reserved=0</a><br> </div> </span></font></div> </div> </body> </html>