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[AMD Public Use]<br>
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Reviewed-by: Alex Deucher <alexander.deucher@amd.com><br>
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<div id="divRplyFwdMsg" dir="ltr"><font face="Calibri, sans-serif" style="font-size:11pt" color="#000000"><b>From:</b> Liang, Prike <Prike.Liang@amd.com><br>
<b>Sent:</b> Monday, June 8, 2020 3:34 AM<br>
<b>To:</b> amd-gfx@lists.freedesktop.org <amd-gfx@lists.freedesktop.org><br>
<b>Cc:</b> Deucher, Alexander <Alexander.Deucher@amd.com>; Huang, Ray <Ray.Huang@amd.com>; Liang, Prike <Prike.Liang@amd.com><br>
<b>Subject:</b> [PATCH] drm/amdgpu/soc15: fix nullptr issue in soc15_read_register() for reg base accessing</font>
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<div class="PlainText">The failed case is no SDMA1 IP for Renoir discovery table while in accessing SDMA1 reg base,<br>
thus need have nullptr test for soc15_read_register invoked in MMR addres space inqure opt.<br>
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Signed-off-by: Prike.Liang <Prike.Liang@amd.com><br>
---<br>
drivers/gpu/drm/amd/amdgpu/soc15.c | 3 ++-<br>
1 file changed, 2 insertions(+), 1 deletion(-)<br>
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diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
index 623745b..3e406ee 100644<br>
--- a/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
+++ b/drivers/gpu/drm/amd/amdgpu/soc15.c<br>
@@ -415,7 +415,8 @@ static int soc15_read_register(struct amdgpu_device *adev, u32 se_num,<br>
*value = 0;<br>
for (i = 0; i < ARRAY_SIZE(soc15_allowed_read_registers); i++) {<br>
en = &soc15_allowed_read_registers[i];<br>
- if (reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]<br>
+ if (adev->reg_offset[en->hwip][en->inst] &&<br>
+ reg_offset != (adev->reg_offset[en->hwip][en->inst][en->seg]<br>
+ en->reg_offset))<br>
continue;<br>
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-- <br>
2.7.4<br>
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